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    METHOD AND SYSTEM FOR FPGA-BASED ENCRYPTED VPN
    1.
    发明公开
    METHOD AND SYSTEM FOR FPGA-BASED ENCRYPTED VPN 审中-公开

    公开(公告)号：US20240296254A1

    公开(公告)日：2024-09-05

    申请号：US18570420

    申请日：2022-06-22

    申请人： Timur ASKEROV ,  Roman VERCETTI

    发明人： Timur ASKEROV ,  Roman VERCETTI

    IPC分类号： G06F21/76 ,  G06F21/60 ,  G06F21/64

    CPC分类号： G06F21/76 ,  G06F21/602 ,  G06F21/64

    摘要： A system and methods are provided for encrypting and decrypting data payloads, receiving an unencrypted data payload; generating a random seed value; generating in FPGA firmware an encryption hash key from seed parameters including the seed value, XORing the encryption hash key with the unencrypted data payload to generate an encrypted data payload; transmitting the encrypted data packet with the seed value and the encrypted data payload to a second FPGA that regenerates the hash key from the see parameters and XORing the hash key with the encrypted data payload to regenerate an unencrypted data payload.

    Method for storing key data in an electronic component
    2.
    发明授权
    Method for storing key data in an electronic component 有权

    公开(公告)号：US12058254B2

    公开(公告)日：2024-08-06

    申请号：US17271700

    申请日：2019-06-25

    申请人： Siemens Aktiengesellschaft

    发明人： Christian Cech ,  Thomas Hinterstoisser ,  Martin Matschnig ,  Herbert Taucher

    IPC分类号： H04L9/08 ,  G06F21/76

    CPC分类号： H04L9/0894 ,  G06F21/76

    摘要： A method for storing key data in an electronic component formed as an integrated programmable circuit, such as a field programmable gate array, which includes a base structure consisting of base elements, wherein configuration data is loaded, for each current program, onto the base elements and stored in a volatile matter, the key data is divided into key sub-data blocks, and a base element position is selected for each key sub-data block, where upon generating the configuration data for each current program or circuit function of the electronic component, selected base element positions of the key sub-data blocks are considered, while loading the configuration data, key sub-data blocks are stored in the base elements defined by selected base element positions, and after successfully programming the electronic component, the key sub-data blocks of base elements specified by selected base element positions are ascertained and assembled to form the key data.

    Security device with programmable systolic-matrix cryptographic module and programmable input/output interface
    7.
    发明授权
    Security device with programmable systolic-matrix cryptographic module and programmable input/output interface 有权

    公开(公告)号：US11921906B2

    公开(公告)日：2024-03-05

    申请号：US17691986

    申请日：2022-03-10

    申请人： SECTURION SYSTEMS, INC.

    发明人： Richard J. Takahashi

    IPC分类号： G06F21/60 ,  G06F21/72 ,  G06F21/76 ,  H04L9/40

    CPC分类号： G06F21/72 ,  G06F21/76 ,  H04L63/0485

    摘要： A system includes programmable systolic cryptographic modules for security processing of packets from a data source. A first programmable input/output interface routes each incoming packet to one of the systolic cryptographic modules for encryption processing. A second programmable input/output interface routes the encrypted packets from the one systolic cryptographic module to a common data storage. In one embodiment, the first programmable input/output interface is coupled to an interchangeable physical interface that receives the incoming packets from the data source. In another embodiment, each cryptographic module includes a programmable systolic packet input engine, a programmable cryptographic engine, and a programmable systolic packet output engine, each configured as a systolic array (e.g., using FPGAs) for data processing.

    Physical barrier to inhibit a penetration attack
    9.
    发明授权
    Physical barrier to inhibit a penetration attack 有权

    公开(公告)号：US11886626B2

    公开(公告)日：2024-01-30

    申请号：US17347073

    申请日：2021-06-14

    申请人： Utimaco Inc.

    发明人： John M. Lewis ,  Alvin H. Diep

    IPC分类号： G06F21/86 ,  G06F21/76 ,  H04L9/40

    CPC分类号： G06F21/86 ,  G06F21/76 ,  H04L63/0428

    摘要： An apparatus that includes a substrate and a first plurality of circuit components mounted on the substrate, which is associated with a protected area. The apparatus includes a connector formed on the substrate to at least partially circumscribe the protected area and a second plurality of circuit components mounted on the substrate to at least partially circumscribe the connector to form a security barrier to physically inhibit a penetration attack into the protected area.