Abstract:
A display device includes a display panel including a pixel, a voltage line supplying a power voltage to the pixel, and a reference voltage line supplying one of a reference voltage and the power voltage to the pixel; a mode selector configured to output one of a first selection signal and a second selection signal according to an operation mode of the display panel; and a switch configured to provide the reference voltage or the power voltage to the reference voltage line in response to one of the first selection signal and the second selection signal.
Abstract:
An organic light emitting display includes: a first pixel; and a second pixel adjacent to the first pixel, the second pixel being configured to emit light at a different time from the first pixel, wherein the first pixel and the second pixel share a storage capacitor configured to store a voltage of a data signal.
Abstract:
A scan driver includes scan-driving blocks, each including a first transistor having a gate coupled to a first node to supply a first power to an output terminal, a second transistor having a gate coupled to a second node to couple a second clock to the output terminal, a third transistor having a gate coupled to a first input to supply the first power to the first node, a fourth transistor having a gate coupled to a second input to supply a second power to the first node, and a fifth transistor having a gate coupled to a first clock to couple the first input to the second node. A first scan-driving block further includes a sixth transistor coupled between the second input and the fourth transistor gate, and a NOT gate configured to invert the first input signal and to supply the inverted signal to the sixth transistor gate.
Abstract:
A scan driving device includes shift registers, each including a first signal terminal to which a forward direction driving start signal is transferred, a second signal terminal to which a backward direction driving start signal is transferred, a clock signal terminal and a clock bar signal terminal to which a clock signal and a clock bar signal are applied, a sustain signal terminal to which a sustain signal is transferred, a control signal terminal to which a control signal is transferred, a gate clock signal terminal to which a gate clock signal is transferred, and an output signal terminal, where driving power source voltages including a high potential power source voltage and low potential power source voltages is applied to each shift register, and an application of the low potential power source voltages to each shift register is controlled based on the sustain signal.
Abstract:
A display device includes: a display panel including: a display portion for displaying an image; and a first pad coupled with the display portion and for receiving an out signal from the display portion; a driver coupled with the display portion for supplying a driving signal to the display portion; a cover covering the display panel; and a connection unit coupling the first pad and the driver to each other to transmit the out signal to the driver, wherein at least a portion of the connection unit is in the cover.
Abstract:
A scan driver includes scan-driving blocks, each including a first transistor having a gate coupled to a first node to supply a first power to an output terminal, a second transistor having a gate coupled to a second node to couple a second clock to the output terminal, a third transistor having a gate coupled to a first input to supply the first power to the first node, a fourth transistor having a gate coupled to a second input to supply a second power to the first node, and a fifth transistor having a gate coupled to a first clock to couple the first input to the second node. A first scan-driving block further includes a sixth transistor coupled between the second input and the fourth transistor gate, and a NOT gate configured to invert the first input signal and to supply the inverted signal to the sixth transistor gate.