Methods and apparatus to implement annotation based thunking
    51.
    发明申请
    Methods and apparatus to implement annotation based thunking 失效
    实施基于注解的方法和装置

    公开(公告)号:US20070234286A1

    公开(公告)日:2007-10-04

    申请号:US11440850

    申请日:2006-05-25

    IPC分类号: G06F9/44 G06F9/45

    CPC分类号: G06F9/455

    摘要: Methods and apparatus to implement annotation based thunking are disclosed. An example method comprises locating a parameter of a function, the parameter to be passed as a pointer if a size of the parameter is greater than a threshold and to be passed as data if the size of the parameter is not greater than the threshold, and adding an annotation record for the parameter to a byte code image file containing byte code for the function.

    摘要翻译: 披露了实现基于注解的拆分的方法和装置。 一种示例性方法包括:如果参数的大小大于阈值,则定位要作为指针传递的参数的参数,并且如果参数的大小不大于阈值则作为数据传递;以及 将该参数的注释记录添加到包含该函数的字节码的字节码图像文件中。

    Simulate usercalling's test system and method which built-in digital spc-exchange
    52.
    发明申请
    Simulate usercalling's test system and method which built-in digital spc-exchange 有权
    模拟用户呼叫的测试系统和内置数字交换的方法

    公开(公告)号:US20070116188A1

    公开(公告)日:2007-05-24

    申请号:US10581326

    申请日:2004-06-22

    IPC分类号: H04M3/08 H04M1/24 H04M3/22

    CPC分类号: H04M3/241

    摘要: The present invention disclosed a kind of simulate user calling's test system and method which built-in digital SPC exchange, include background processing module, foreground calling control processing module and hardware subsystem, therein: background processing module operation on exchange servicing platform, for supply user setting parameter and display operate interface for test result, foreground calling control processing module is include in the exchange main control module, for control said hardware subsystem execute test process according to designed logical flow and user mount parameter, hardware subsystem composed of loop circuit relay single board, simulation user interface board, interface board control processing unit, multifunction resources process board. Adopt present invention may use few cost to reach the test result which equal to commercial calling device, and may reach more mobility, reach inline test function.

    摘要翻译: 本发明公开了一种模拟用户呼叫的内置数字SPC交换的测试系统和方法,包括后台处理模块,前台呼叫控制处理模块和硬件子系统:交换服务平台的后台处理模块操作,供应用户 设置参数和显示操作界面进行测试结果,前台调用控制处理模块包括在交换主控模块中,用于控制所述硬件子系统根据设计的逻辑流程和用户挂载参数执行测试过程,由循环电路继电器单元 板,模拟用户接口板,接口板控制处理单元,多功能资源处理板。 采用本发明可以使用少量成本来达到等于商业呼叫装置的测试结果,并且可以达到更多的移动性,达到在线测试功能。

    Tracking format of registers having multiple content formats in binary translation
    53.
    发明授权
    Tracking format of registers having multiple content formats in binary translation 有权
    在二进制翻译中具有多种内容格式的寄存器的跟踪格式

    公开(公告)号:US07219336B2

    公开(公告)日:2007-05-15

    申请号:US10037655

    申请日:2002-01-03

    IPC分类号: G06F9/45 G06F9/30 G06F7/00

    CPC分类号: G06F8/52

    摘要: In one embodiment of the invention, a register format of a source register operated on by a source instruction in a source block of code is determined. The register format includes an input instruction format and an output block format of the source block of code. The source block of code runs in a source architecture. The source register has multiple formats and is used as an input of the source instruction. The input instruction format contains format of the source register expected by the source instruction. The output block format contains format of the source register after the source block of code is executed. An instruction format inconsistency is detected between the source register and a target register of a target architecture during a translation phase of a binary translation that translates the source block of code into a target block of code running in the target architecture.

    摘要翻译: 在本发明的一个实施例中,确定由源代码块中的源指令操作的源寄存器的寄存器格式。 寄存器格式包括源代码块的输入指令格式和输出块格式。 源代码块在源架构中运行。 源寄存器有多种格式,用作源指令的输入。 输入指令格式包含源指令预期的源寄存器的格式。 在执行源代码块之后,输出块格式包含源寄存器的格式。 在二进制转换的转换阶段期间,在源寄存器和目标架构的目标寄存器之间检测到指令格式不一致,其将源代码块转换为在目标架构中运行的目标代码块。

    Method and system for allocating register locations in a memory during compilation
    54.
    发明授权
    Method and system for allocating register locations in a memory during compilation 有权
    在编译期间在存储器中分配寄存器位置的方法和系统

    公开(公告)号:US07124271B2

    公开(公告)日:2006-10-17

    申请号:US10684770

    申请日:2003-10-14

    IPC分类号: G06F12/00

    CPC分类号: G06F8/441

    摘要: A compiler includes a location-assigning module to optimally allocate register locations in various memory blocks of a memory during compilation of a program code in accordance with code proximity of the program code in accessing the register locations and size of each of the memory blocks.

    摘要翻译: 编译器包括位置分配模块,用于根据在访问每个存储器块的寄存器位置和大小时程序代码的接近程序在编程程序代码期间最佳地分配存储器的各种存储器块中的寄存器位置。

    Compiler with two phase bi-directional scheduling framework for pipelined processors
    55.
    发明申请
    Compiler with two phase bi-directional scheduling framework for pipelined processors 审中-公开
    用于流水线处理器的具有两相双向调度框架的编译器

    公开(公告)号:US20050125786A1

    公开(公告)日:2005-06-09

    申请号:US10731946

    申请日:2003-12-09

    IPC分类号: G06F9/45

    CPC分类号: G06F8/4451

    摘要: A method of scheduling a sequence of instructions is described. A target program is read, a pipeline control hazard is identified within the sequence of instructions, and a selected sequence of instructions is re-ordered. Two steps for re-ordering are applied to the selected sequence of instructions. First, a backward scheduling method is performed, and second, a forward scheduling method is performed.

    摘要翻译: 描述了一种调度指令序列的方法。 读取目标程序,在指令序列内识别流水线控制危险,并且重新排序选定的指令序列。 重新排序的两个步骤被应用于所选择的指令序列。 首先,执行反向调度方法,其次,执行前向调度方法。