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51.发明授权公开(公告)号：US09837036B2
公开(公告)日：2017-12-05
申请号：US14862388
申请日：2015-09-23
发明人： Tadashi Amino , Jong Hee Kim , Masataka Kano , Jun Hyun Park
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2300/0417 , G11C19/184 , G11C19/28 , H01L27/124 , H01L27/1255
摘要： A gate driving circuit including: a plurality of stages outputting signals to gate lines, the stages includes a first transistor of which one end and a control terminal are connected, one end and the control terminal are connected with a first input terminal, and the other end is connected to a second node, a second transistor including a control terminal connected to a first node, connected with a clock input terminal, and the other end connected to a first output terminal, a first capacitor of which one end is connected to the first node, the other end is connected to the other end of the second transistor and the first output terminal, and a third transistor of which one end is connected to the other end of the first transistor, the other end is connected with the first node, and a control terminal is connected to a third node.
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公开(公告)号：US20170345515A1
公开(公告)日：2017-11-30
申请号：US15532343
申请日：2016-09-30
发明人： Guangliang SHANG
CPC分类号： G11C19/186 , G09G3/2096 , G09G2310/0286 , G11C19/287
摘要： Disclosed are a shift register unit, an operation method therefor and a shift register including the shift register unit. The shift register unit includes: an input module configured to transmit a received input signal to a pull-up node; an output module configured to output a first control signal of a first control signal end to an output end when a pull-up signal at the pull-up node is at an effective pull-up level; and a coupling module having a first end connected to a second control signal end and a second end connected to the pull-up node, and being configured to control the pull-up signal at the pull-up node in a voltage coupling manner according to a second control signal of the second control signal end. By further pulling up the voltage at the pull-up node when output end is reset, the speed of resetting the output end can be increased.
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公开(公告)号：US20170309345A1
公开(公告)日：2017-10-26
申请号：US15584117
申请日：2017-05-02
发明人： Atsushi UMEZAKI
CPC分类号： G11C19/184 , G09G3/3266 , G09G3/3648 , G09G3/3677 , G09G2300/0426 , G09G2310/0267 , G09G2310/0275 , G09G2310/0286 , G09G2310/0289 , G09G2320/02 , G09G2320/043 , G09G2330/021 , G09G2330/023
摘要： The invention provides a semiconductor device and a shift register, in which low noise is caused in a non-selection period and a transistor is not always on. First to fourth transistors are provided. One of a source and a drain of the first transistor is connected to a first wire, the other of the source and the drain thereof is connected to a gate electrode of the second transistor, and a gate electrode thereof is connected to a fifth wire. One of a source and a drain of the second transistor is connected to a third wire and the other of the source and the drain thereof is connected to a sixth wire. One of a source and a drain of the third transistor is connected to a second wire, the other of the source and the drain thereof is connected to the gate electrode of the second transistor, and a gate electrode thereof is connected to a fourth wire. One of a source and a drain of the fourth transistor is connected to the second wire, the other of the source and the drain thereof is connected to the sixth wire, and a gate electrode thereof is connected to the fourth wire.
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公开(公告)号：US20170186361A1
公开(公告)日：2017-06-29
申请号：US15375575
申请日：2016-12-12
申请人： AU OPTRONICS CORP.
发明人： Wei-Li LIN , Che-Wei Tung , Yan-Ting Chen
CPC分类号： G09G3/2092 , G09G2300/0408 , G09G2300/0465 , G09G2300/0842 , G09G2310/0202 , G09G2310/0267 , G09G2310/0286 , G11C19/184 , G11C19/28
摘要： A shift register includes a control circuit, a switching circuit, a driving circuit, and a pull-down circuit. The control circuit is configured to output a control signal having a high level during a pull-up period and a voltage-regulating period respectively. The switching circuit is configured to provide a control voltage according to the control signal and a front stage signal outputted by a front x-stage shift register during the pull-up period. The driving circuit is configured to generate a driving signal according to the control voltage provided by the switching circuit, and output a home stage scan signal based on the driving signal. The pull-down circuit is configured to pull down a voltage level of the driving signal according to a scan signal outputted by a rear y-stage shift register during a pull-down period. The switching circuit is configured to regulate the driving signal and the home stage scan signal.
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公开(公告)号：US09646714B2
公开(公告)日：2017-05-09
申请号：US14800765
申请日：2015-07-16
发明人： Atsushi Umezaki
IPC分类号： G11C19/00 , G11C19/18 , G09G3/3266 , G09G3/36
CPC分类号： G11C19/184 , G09G3/3266 , G09G3/3648 , G09G3/3677 , G09G2300/0426 , G09G2310/0267 , G09G2310/0275 , G09G2310/0286 , G09G2310/0289 , G09G2320/02 , G09G2320/043 , G09G2330/021 , G09G2330/023
摘要： The invention provides a semiconductor device and a shift register, in which low noise is caused in a non-selection period and a transistor is not always on. First to fourth transistors are provided. One of a source and a drain of the first transistor is connected to a first wire, the other of the source and the drain thereof is connected to a gate electrode of the second transistor, and a gate electrode thereof is connected to a fifth wire. One of a source and a drain of the second transistor is connected to a third wire and the other of the source and the drain thereof is connected to a sixth wire. One of a source and a drain of the third transistor is connected to a second wire, the other of the source and the drain thereof is connected to the gate electrode of the second transistor, and a gate electrode thereof is connected to a fourth wire. One of a source and a drain of the fourth transistor is connected to the second wire, the other of the source and the drain thereof is connected to the sixth wire, and a gate electrode thereof is connected to the fourth wire.
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公开(公告)号：US09620078B2
公开(公告)日：2017-04-11
申请号：US14861251
申请日：2015-09-22
申请人： AU OPTRONICS CORP.
发明人： Kai-Wei Hong , Hsiang-Sheng Chang , Yung-Chih Chen , Chun-Da Tu , Cheng-Han Huang , Chuang-Cheng Yang
CPC分类号： G09G5/003 , G06F3/041 , G06F3/0412 , G06F3/0416 , G09G2310/0286 , G09G2310/0294 , G09G2310/062 , G11C19/184 , G11C19/28
摘要： A touch display apparatus includes a touch driver and a display driver. The touch driver outputs touch signals to drive a touch panel. The display driver outputs scan signals to drive a display panel. A display driver has a plurality of shift registers, and each of the plurality of shift registers includes a pull-up unit, a driving unit, a pull-down unit and a holding unit. The pull-up unit is electrically connected to a driving node for outputting a driving voltage. The driving unit is electrically connected to the driving node for outputting a first scan signal according to a clock. A pull-down unit is electrically connected to the driving node and the output terminal, for pulling down the voltage level of the driving voltage and the first scan signal, respectively. The holding unit is electrically connected to the driving node.
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公开(公告)号：US09460679B2
公开(公告)日：2016-10-04
申请号：US14930160
申请日：2015-11-02
CPC分类号： G09G3/3677 , G09G3/36 , G09G3/3648 , G09G3/3659 , G09G3/3688 , G09G3/3696 , G09G5/39 , G09G2300/0408 , G09G2310/0286 , G09G2310/08 , G09G2330/021 , G11C19/184 , G11C19/28 , H01L27/12 , H01L27/124 , H01L29/42384
摘要： A display driving circuit having a shift register is formed on the display panel. The shift register includes a first stage having first and second transistors and a second stage having a third and fourth transistor. A voltage of a control electrode of the first transistor is boosted by a voltage of a first pulse line changing from low to high. In an On state, the second transistor connects the control electrode of the first transistor and a constant voltage line. A voltage of a control electrode of the third transistor is boosted by a voltage of a second pulse line changing from low to high. In an On state, the fourth transistor connects the control electrode of the third transistor and a constant voltage line. The fourth transistor is switched on by a signal from the first stage.
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公开(公告)号：US09437141B2
公开(公告)日：2016-09-06
申请号：US13191646
申请日：2011-07-27
申请人： Wang-Jo Lee , Hyung-Soo Kim , In-Ho Choi , Choon-Yul Oh , Ho-Ryun Chung , Joo-Hyeon Jeong , Myoung-Hwan Yoo , Jin-Woo Kim , Naoaki Komiya
发明人： Wang-Jo Lee , Hyung-Soo Kim , In-Ho Choi , Choon-Yul Oh , Ho-Ryun Chung , Joo-Hyeon Jeong , Myoung-Hwan Yoo , Jin-Woo Kim , Naoaki Komiya
CPC分类号： G09G3/3291 , G09G2310/0286 , G11C19/184 , G11C19/28
摘要： A scan driver includes: a plurality of scan driving blocks including an output terminal outputting a scan signal to a scan line; a first transistor transmitting a voltage of a power source to the output terminal; a second transistor transmitting a clock signal to the output terminal; and a third transistor including a gate electrode connected to a node formed with a gate-on voltage turning on the second transistor, one terminal connected to the power source, and the other terminal connected to the gate electrode of the first transistor. The scan driver may reduce the influence of a leakage current even though application of the scan signal is increased, and a scan signal of a uniform voltage level may be output.
摘要翻译： 扫描驱动器包括：多个扫描驱动块，包括将扫描信号输出到扫描线的输出端; 向所述输出端子发送电源的电压的第一晶体管; 向所述输出端发送时钟信号的第二晶体管; 以及第三晶体管，包括连接到形成有接通第二晶体管的栅极导通电压的节点的栅电极，连接到电源的一个端子和连接到第一晶体管的栅电极的另一端子。 即使扫描信号的施加增加，扫描驱动器也可以减小泄漏电流的影响，并且可以输出均匀电压电平的扫描信号。
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59.发明申请SHIFT REGISTER UNIT, DRIVING METHOD THEREOF, GATE DRIVER CIRCUIT AND DISPLAY DEVICE 有权移位寄存器单元，其驱动方法，门驱动电路和显示器件公开(公告)号：US20160246418A1
公开(公告)日：2016-08-25
申请号：US14764066
申请日：2014-11-19
发明人： Shijun WANG , Xiaochuan CHEN , Lei WANG , Yanna XUE , Wenbo JIANG , Yue LI , Zhiying BAO , Zhenhua LV , Wenjun XIAO
CPC分类号： G06F3/0412 , G06F3/0416 , G09G3/20 , G09G3/2096 , G09G3/3677 , G09G2310/0286 , G09G2320/0219 , G11C19/184 , G11C19/28
摘要： A shift register unit includes a pull-down maintenance module configured to pull down potentials at a pull-up node and a gate signal output end; a reset module configured to, at a touch stage within one frame of time, reset a potential of a signal from the gate signal output end to a potential of a fourth signal; a first signal output control module configured to, at a display stage within one frame of time, control a first signal output end to output a first common electrode signal, and at the touch stage within one frame of time, control the first signal output end to output a first signal input in the first signal input end. The first signal is a signal inputted at the touch stage to a common electrode connected to the shift register unit.
摘要翻译： 移位寄存器单元包括：下拉维护模块，被配置为在上拉节点和门信号输出端下拉电位; 复位模块，被配置为在一个时间帧内的触摸阶段将来自所述门信号输出端的信号的电位复位到第四信号的电位; 第一信号输出控制模块，被配置为在一个时间段内的显示阶段控制第一信号输出端输出第一公共电极信号，并且在一个帧内的触摸阶段，控制第一信号输出端 以输出在第一信号输入端输入的第一信号。 第一信号是在触摸级输入到连接到移位寄存器单元的公共电极的信号。
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公开(公告)号：US09424949B2
公开(公告)日：2016-08-23
申请号：US14481183
申请日：2014-09-09
申请人： AU OPTRONICS CORP.
发明人： Kai-Wei Hong , Pin-Yu Chan , Yung-Chih Chen , Li-Wei Liu
CPC分类号： G11C19/28 , G09G2310/0286 , G11C19/186
摘要： A shift register circuit includes a first transistor, a capacitor, a pull-up control circuit, a first pull-down circuit, a pull-down control circuit, a second pull-down circuit and a compensation circuit. The compensation circuit further includes a second transistor, a third transistor, a fourth transistor, a fifth transistor and a sixth transistor. The second transistor, the third transistor, the fourth transistor, and the fifth transistor are corporately used to output a compensation pulse; and the sixth transistor is used to output the compensation pulse to a gate terminal of the first transistor thereby compensating a control signal.
摘要翻译： 移位寄存器电路包括第一晶体管，电容器，上拉控制电路，第一下拉电路，下拉控制电路，第二下拉电路和补偿电路。 补偿电路还包括第二晶体管，第三晶体管，第四晶体管，第五晶体管和第六晶体管。 第二晶体管，第三晶体管，第四晶体管和第五晶体管共同地用于输出补偿脉冲; 并且第六晶体管用于将补偿脉冲输出到第一晶体管的栅极端子，从而补偿控制信号。
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