公开(公告)号：US20250031531A1

公开(公告)日：2025-01-23

申请号：US18282106

申请日：2022-11-28

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ying HAN ,  Pan XU ,  Xing ZHANG ,  Guangshuang LV ,  Donghui ZHAO ,  Chengyuan LUO ,  Cheng XU

IPC: H10K59/124 ,  G09G3/00 ,  G09G3/3225 ,  H10K59/122 ,  H10K59/131

Abstract: A display substrate and a display device, the display substrate includes a base substrate, a pixel driving circuit layer, a first planarization layer, a first metal layer, a second planarization layer, a plurality of first electrodes and a pixel definition layer; the pixel driving circuit layer includes a plurality of pixel driving circuits, the first planarization layer includes a plurality of first vias respectively exposing output terminals of the pixel driving circuits, the first metal layer includes a plurality of data lines extending in a first direction, the pixel definition layer includes a plurality of first definition walls extending in the first direction and a plurality of second definition walls extending in a second direction, and an orthographic projection of at least part of the data lines on the base substrate respectively overlaps with orthographic projections of the plurality of first definition walls on the base substrate.

公开(公告)号：US20250029558A1

公开(公告)日：2025-01-23

申请号：US18281110

申请日：2022-11-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xing ZHANG ,  Pan XU ,  Donghui ZHAO ,  Ying HAN ,  Chengyuan LUO ,  Guangshuang LV ,  Cheng XU ,  Miao LIU ,  Dandan ZHOU

IPC: G09G3/3233

Abstract: A driving circuit, a driving method and a display device are provided. The driving circuit includes a first control node control circuit, a second control node control circuit, a first node control circuit and a second node control circuit, wherein, the first control node control circuit is configured to control a potential of the first control node; the second control node control circuit is configured to control a potential of the second control node; the first node control circuit is configured to control a potential of the first node; the second node control circuit is electrically connected to the second control node, a first clock signal terminal and a second node respectively, and is configured to control to connect the first clock signal terminal and the second node under the control of the potential of the second control node.

公开(公告)号：US20240179969A1

公开(公告)日：2024-05-30

申请号：US17789852

申请日：2021-06-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ying HAN ,  Yicheng LIN ,  Pan XU ,  Guoying WANG ,  Xing ZHANG ,  Zhan GAO ,  Mingi CHU

IPC: H10K59/131

CPC classification number: H10K59/131

Abstract: A display panel has a display region, a fan-out region located on a side of the display region, and a bonding region located on a side of the fan-out region away from the display region. The display panel includes a gate driving circuit disposed in the display region, a plurality of data lines and a plurality of control signal lines that all extends from the display region to the fan-out region, and a plurality of data fan-out leads and a plurality of first fan-out leads that are all disposed in the fan-out region. Each data line is electrically connected to a data fan-out lead. The data fan-out leads are gathered to the bonding region. The control signal lines are electrically connected to the gate driving circuit. Each control signal line is electrically connected to a first fan-out lead. The first fan-out leads are gathered to the bonding region.

公开(公告)号：US20240179949A1

公开(公告)日：2024-05-30

申请号：US17789158

申请日：2021-06-25

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ying HAN ,  Pan XU ,  Wei LI ,  Yichi ZHANG ,  Ying ZHOU

IPC: H10K59/122 ,  H10K59/35 ,  H10K59/80

CPC classification number: H10K59/122 ,  H10K59/353 ,  H10K59/80516

Abstract: A display substrate includes: a base substrate; a plurality of pixel circuits on the base substrate; and a plurality of pixels; the pixel includes a first sub-pixel, a second sub-pixel and a third sub-pixel; orthographic projections of the first sub-pixel, the second sub-pixel and the third sub-pixel on the base substrate do not overlap with each other; the first sub-pixel, the second sub-pixel and the third sub-pixel are electrically connected to the pixel circuits in a one-to-one correspondence manner; a first distance in a first direction exists between the first sub-pixel and the second sub-pixel, and a first via is arranged in the first distance; a second distance in the first direction exists between the first sub-pixel and the third sub-pixel, and a first via is arranged in the second distance; a third distance in the first direction exists between the second sub-pixel and the third sub-pixel.

公开(公告)号：US20240169925A1

公开(公告)日：2024-05-23

申请号：US17779164

申请日：2021-03-29

Applicant: Hefei BOE Joint Technology Co.,Ltd. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhidong YUAN ,  Pan XU ,  Yongqian LI ,  Can YUAN ,  Zhongyuan WU

IPC: G09G3/3266 ,  G09G3/32 ,  G11C19/28

CPC classification number: G09G3/3266 ,  G09G3/32 ,  G09G2300/0426 ,  G09G2310/0267 ,  G09G2310/0286 ,  G11C19/28

Abstract: A display panel includes sub-pixels and a scan driving circuit. The scan driving circuit includes a plurality of stages of shift registers including at least one first shift register and at least one second shift register, and a plurality of clock signal lines including at least one first sub-clock signal line and at least one second sub-clock signal line. Each shift register includes a first sub-circuit and a second sub-circuit. A first sub-clock signal line in the at least one first sub-clock signal line is electrically connected to a first sub-circuit in a first shift register in the at least one first shift register. A second sub-clock signal line in the at least one second sub-clock signal line is electrically connected to one sub-circuit of a first sub-circuit and a second sub-circuit in a second shift register in the at least one second shift register.

公开(公告)号：US20230169908A1

公开(公告)日：2023-06-01

申请号：US17921585

申请日：2021-05-12

Applicant: BOE Technology Group Co., Ltd.

Inventor： Pan XU ,  Yicheng LIN ,  Guoying WANG ,  Xing ZHANG ,  Ying HAN ,  Zhan GAO ,  Dacheng ZHANG

IPC: G09G3/20

CPC classification number: G09G3/2092 ,  G09G2310/0267 ,  G09G2300/0439

Abstract: A special-shaped display panel includes: a special-shaped display area (S) having gate lines (G), some of the gate lines (G) being cut off in a non-display sub-area (S2) of the special-shaped display area (S); a first gate drive circuit set (A1) located on one side of the special-shaped display area (S), electrically connected to one ends of gate lines (G) which are not cut off by the non-display sub-area (S2), and electrically connected to gate lines (G) on one side which are cut off by the non-display sub-area (S2); and a second gate drive circuit set (A2) located on the other side of the special-shaped display area (S), electrically connected to the other ends of gate lines (G) which are not cut off by the non-display sub-area (S2), and electrically connected gate lines (G) on the other side which are cut off by the non-display sub-area (S2).

公开(公告)号：US20230165091A1

公开(公告)日：2023-05-25

申请号：US17629772

申请日：2021-04-30

Applicant: Chengdu BOE Optoelectronics Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Yuanjie XU ,  Benlian WANG ,  Lili DU ,  Zhenhua ZHANG ,  Yuxin ZHANG ,  Pan XU

IPC: H10K59/131 ,  G09G3/3233 ,  H10K59/12

CPC classification number: H10K59/1315 ,  G09G3/3233 ,  H10K59/1201 ,  G09G2300/0842 ,  G09G2300/0819 ,  G09G2300/0861 ,  G09G2310/08 ,  G09G2300/0426 ,  H10K59/35

Abstract: Provided are a display substrate, a preparation method thereof, and a display device. The display substrate includes a display region and a bonding region on one side of the display region. The bonding region at least includes a lead area; the display region includes a plurality of data lines and a plurality of data fanout lines, the lead area includes a plurality of lead wires, and orthographic projections of the plurality of data lines and the plurality of data fanout lines on a plane of the display substrate are at least partially overlapped. At least one lead wire is connected to the data line through the data fanout line. In the lead area, an orthographic projection of any one of the lead wires on the plane of the display substrate and orthographic projections of other lead wires on the plane of the display substrate have no overlap region.

公开(公告)号：US20230165080A1

公开(公告)日：2023-05-25

申请号：US17640230

申请日：2021-01-29

Applicant: BOE Technology Group Co., Ltd.

Inventor： Pan XU ,  Dacheng ZHANG ,  Xing ZHANG

IPC: H10K59/131 ,  H10K59/121

CPC classification number: H10K59/131 ,  H10K59/1213 ,  H10K59/1216

Abstract: A display substrate and a display device, include: a base substrate, which includes a display area, and a bonding area (BA) disposed on one side of the display area; a plurality of gate lines, a plurality of data lines, a plurality of lead lines, the plurality of lead lines each is respectively electrically connected with a respective one of the plurality of data lines, each of the plurality of lead lines includes a first portion extending in the second direction, and orthographic projections of at least part of the first portions on the base substrate do not overlap with orthographic projections of the data lines on the base substrate.

公开(公告)号：US20220384763A1

公开(公告)日：2022-12-01

申请号：US17761537

申请日：2021-05-20

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xuefei SUN ,  Jaegeon YOU ,  Xing ZHANG ,  Yicheng LIN ,  Pan XU ,  Ying HAN ,  Guoying WANG ,  Zhan GAO

IPC: H01L51/52 ,  H01L51/56

Abstract: The present disclosure provides a transparent display device, a simulation method, and a manufacturing method. The transparent display device includes a base substrate and a plurality of pixels arranged in an array form on the base substrate. Each pixel includes a transparent region and a display region, and a scattering structure for scattering light is arranged along a boundary between the transparent region and the display region.

公开(公告)号：US20220254857A1

公开(公告)日：2022-08-11

申请号：US17273290

申请日：2020-05-29

Applicant: BOE Technology Group Co., Ltd.

Inventor： Pan XU ,  Yicheng LIN ,  Ling WANG ,  Guoying WANG ,  Xing ZHANG ,  Ying HAN

IPC: H01L27/32 ,  G09G3/3266 ,  G09G3/3233

Abstract: Provided are a display substrate and display apparatus. The display substrate includes a display region and non-display region; base substrate, driving structure layer and wiring layer. The driving structure layer located in the display region includes a first power supply line, data signal line and reference signal line extending along a first direction; the wiring layer located in the non-display region includes a first power supply wiring electrically connected to first power supply line and located on first side of the display region, a data wiring located on second side, different from the first side, of the display region, and a reference wiring located on second side of the display region. For the first power supply line, data signal line and reference signal line with the same length, resistance of first power supply line is greater than that of the data signal line and that of the reference signal line.