公开(公告)号：US20220297423A1

公开(公告)日：2022-09-22

申请号：US17806332

申请日：2022-06-10

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Boon Bing Ng ,  Rui Pan ,  Mohan Kumar Sudhakar ,  Brendan Hall

IPC: B41J2/045

Abstract: In some examples, a circuit includes a data line, an input line, a first memory element, and a decoder to receive an address and to enable the first memory element for access in response to the address. The selector is responsive to the data line to select the first memory element, where the selector is to select the first memory element responsive to the data line having a first value, and where the data line is to communicate data of a second memory element in response to the second memory element being enabled for access. The input line is to communicate data of the first memory element in response to the first memory element being selected by the selector.

公开(公告)号：US11364717B2

公开(公告)日：2022-06-21

申请号：US17454069

申请日：2021-11-09

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Boon Bing Ng ,  Rui Pan ,  Mohan Kumar Sudhakar ,  Brendan Hall

IPC: B41J2/045 ,  B41J2/01

Abstract: In some examples, a circuit includes a data line, an input line, a first memory element, and a decoder to receive an address and to enable the first memory element for access in response to the address. The selector is responsive to the data line to select the first memory element, where the selector is to select the first memory element responsive to the data line having a first value, and where the data line is to communicate data of a second memory element in response to the second memory element being enabled for access. The input line is to communicate data of the first memory element in response to the first memory element being selected by the selector.

公开(公告)号：US20210283920A1

公开(公告)日：2021-09-16

申请号：US16316287

申请日：2016-09-30

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Boon Bing Ng ,  Michael W. Cumbie ,  Yee Kiat Ng

IPC: B41J2/175

Abstract: Aspects relating to an ink container for an image reproduction device are described herein. The ink container includes a body and an electrical connection. The body is formed by molding a polymer material having a metal seed layer. The electrical connection is formed by metallizing a plurality of traces in the metal seed layer. The electrical connection extends from an inside wall of the ink container to an outer wall. A width of the electrical connection on the inside wall of the ink container gradually varies from a bottom of the ink container to a rim.

公开(公告)号：US11090926B2

公开(公告)日：2021-08-17

申请号：US16608061

申请日：2017-07-06

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Boon Bing Ng ,  Rui Pan ,  Mohan Kumar Sudhakar ,  Hang Ru Goy

IPC: B41J2/045

Abstract: In some examples, a circuit for use with a fluid ejection device includes a plurality of decoders responsive to a common address to activate respective control signals at different times for selecting respective memories of the fluid ejection device. Each respective decoder of the plurality of decoders comprising a discharge switch to deactivate a control signal of the respective decoder while another decoder of the plurality of decoders is activating a control signal in response to the common address.

公开(公告)号：US20210221124A1

公开(公告)日：2021-07-22

申请号：US16771080

申请日：2019-02-06

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Boon Bing Ng ,  Erik D. Ness ,  James Michael Gardner

IPC: B41J2/045

Abstract: In some examples, a fluid dispensing device component includes a plurality of fluidic dies each comprising a memory, a plurality of control inputs to provide respective control information to respective fluidic dies of the plurality of fluidic dies, and a data bus connected to the plurality of fluidic dies, the data bus to provide data of the memories of the plurality of fluidic dies to an output of the fluid dispensing device component.

公开(公告)号：US10974515B2

公开(公告)日：2021-04-13

申请号：US16480127

申请日：2017-01-31

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Boon Bing Ng ,  Noorashekin Binte Jamil

IPC: B41J2/175 ,  B41J2/045 ,  G11C5/02 ,  G11C16/08 ,  G11C16/24

Abstract: The present subject matter relates to disposing memory banks and select register. In an example implementation, a plurality of memory banks is arranged to form a group of memory banks. Each memory bank includes a plurality of memory units. At least one select register generates a select signal to access the memory units in the plurality of memory banks. The at least one select register is disposed at an end of the group of memory banks.

公开(公告)号：US20210070057A1

公开(公告)日：2021-03-11

申请号：US16951234

申请日：2020-11-18

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Boon Bing Ng ,  Noorashekin Binte Jamil

IPC: B41J2/175 ,  G11C16/06

Abstract: The present subject matter relates to accessing memory units in a memory bank. In an example implementation, a bank select transistor is common to a plurality of memory units in a memory bank. The bank select transistor facilitates accessing a memory unit of the plurality of memory units based on a bank select signal.

公开(公告)号：US10889122B2

公开(公告)日：2021-01-12

申请号：US16480178

申请日：2017-01-31

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Boon Bing Ng ,  Noorashekin Binte Jamil

IPC: B41J2/17 ,  B41J2/175 ,  G11C16/06

Abstract: The present subject matter relates to accessing memory units in a memory bank. In an example implementation, a bank select transistor is common to a plurality of memory units in a memory bank. The bank select transistor facilitates accessing a memory unit of the plurality of memory units based on a bank select signal.

公开(公告)号：US20200031116A1

公开(公告)日：2020-01-30

申请号：US16337837

申请日：2016-10-06

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Boon Bing Ng ,  Hang Ru Goy

IPC: B41J2/045 ,  B41J2/175 ,  G11C7/12 ,  G11C11/4094

Abstract: In some examples, a control apparatus for a fluid ejection device includes a plurality of selectors controllable by an input control signal to produce signals for selecting respective nozzles of the fluid ejection device, where a first selector is responsive to the input control signal propagated over a first signal path to turn on a device in the first selector, and a second selector is responsive to the input control signal to perform a different task. A memory encoder is to select a memory location in the memory, the memory encoder responsive to the input control signal propagated over a second signal path to turn on a device in the memory encoder, where signal loading of the second signal path is isolated from signal loading of the first signal path.

公开(公告)号：US10384449B2

公开(公告)日：2019-08-20

申请号：US15910248

申请日：2018-03-02

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Boon Bing Ng ,  Thida Ma Win ,  Jose Jehrome Rando

IPC: B41J2/14 ,  H01L23/522 ,  H01L23/528 ,  H01L23/00

Abstract: In an example implementation, a grounding structure includes a perimeter ground line around the perimeter of a printhead die, and having north, south, east, and west segments. The structure includes an inter-slot ground line extending from the north segment to the south segment between two fluid slots, and an alternative ground line extending from the east segment to the west segment and intersecting the inter-slot ground line in a connection area near ends of the fluid slots.