Packet communication apparatus and controlling method thereof
    61.
    发明授权
    Packet communication apparatus and controlling method thereof 失效
    分组通信装置及其控制方法

    公开(公告)号:US07221647B2

    公开(公告)日:2007-05-22

    申请号:US10083253

    申请日:2002-02-27

    IPC分类号: H04L12/56

    摘要: Disclosed is a packet communication apparatus of large capacity capable of realizing high throughput and packet priority control in packet switching for changing connection of input and output ports of a switch on a variable-length packet unit basis. A variable-length packet is divided into a group of cells in an ingress interface, and the cells are stored in VOQs divided in correspondence with destination output ports of a switch. For each of the VOQs, a corresponding first-cell storing register is provided. When a packet arrives at the head of the VOQ, the first cell indicating an output path of the packet is transferred to a first-cell storing register. Each ingress interface selects one of first cells of packets which can be output and transmits the selected one to the switch. The switch performs a scheduling process so as to select one first cell per output port. The ingress interface to which output permission is given by the scheduling process is connected to a desired output port, and continuously outputs the first cell and the subsequent cells stored in the VOQs to the output port on a packet unit basis.

    摘要翻译: 公开了一种大容量的分组通信装置,其能够在分组交换中实现高吞吐量和分组优先级控制,以便在可变长度分组单元的基础上改变交换机的输入和输出端口的连接。 可变长度分组在入口接口中被划分为一组小区,并且这些小区被存储在与交换机的目的地输出端口相对应的VOQ中。 对于每个VOQ,提供相应的第一单元存储寄存器。 当分组到达VOQ的头部时,指示分组的输出路径的第一小区被传送到第一小区存储寄存器。 每个入口接口选择可以输出的分组的第一小区中的一个,并将所选择的小区发送给交换机。 交换机执行调度处理,以便每个输出端口选择一个第一个单元。 由调度处理给出输出许可的入口接口连接到期望的输出端口,并且以分组单位连续地将存储在VOQ中的第一小区和后续小区输出到输出端口。

    Sensor network system and data transfer method for sensing data
    62.
    发明申请
    Sensor network system and data transfer method for sensing data 有权
    传感器网络系统和数据传输方法

    公开(公告)号:US20060242285A1

    公开(公告)日:2006-10-26

    申请号:US11335633

    申请日:2006-01-20

    申请人: Norihiko Moriwaki

    发明人: Norihiko Moriwaki

    IPC分类号: G06F15/173

    CPC分类号: H04L67/12 H04W84/18

    摘要: To suppress a server processing load and a network load in a sensor network which accommodates a great number of mobile sensor nodes. Among a plurality of distributed data processing servers (DDS) for managing data of sensor nodes, a distributed data processing server (DDS) that is a home server to hold data of a mobile sensor node is set for each sensor node by a directory server (DRS). At each distributed data processing server (DDS), upon reception of the data from the sensor node, identification process is executed as to whether the data is sensor data to be managed by itself or another distributed data processing server. If a result of the identification is the sensor data to be managed by another distributed data processing server, the data is transferred to the distributed data processing server (DDS-1), which corresponds to the home server of the sensor data, based on setting of the directory server (DRS).

    摘要翻译: 抑制容纳大量移动传感器节点的传感器网络中的服务器处理负载和网络负载。 在用于管理传感器节点数据的多个分布式数据处理服务器(DDS)中,由目录服务器为每个传感器节点设置作为用于保存移动传感器节点数据的归属服务器的分布式数据处理服务器(DDS) DRS)。 在每个分布式数据处理服务器(DDS)处,在从传感器节点接收到数据时,执行关于数据是自身还是其他分布式数据处理服务器要管理的传感器数据的识别处理。 如果识别的结果是由另一个分布式数据处理服务器管理的传感器数据,则基于设置将数据传送到对应于传感器数据的家庭服务器的分布式数据处理服务器(DDS-1) 的目录服务器(DRS)。

    Leaky bucket type traffic shaper and bandwidth controller
    63.
    发明授权
    Leaky bucket type traffic shaper and bandwidth controller 失效
    漏斗式流量整形器和带宽控制器

    公开(公告)号:US07023799B2

    公开(公告)日:2006-04-04

    申请号:US10079583

    申请日:2002-02-22

    IPC分类号: H04L12/56

    CPC分类号: H04L12/5602 H04L47/22

    摘要: A traffic shaper comprises a bandwidth controller 40 having a plurality of leaky bucket units 41-1 to 41-n prepared in correspondence with buffer memories 20-1 to 20-n, and an output queue designation unit 43 for specifying a buffer memory from which a packet is to be read out. Each of the leaky bucket units 41 has a level counter 416 for decrementing the count value at a predetermined rate, and a level increaser 411 to 417 for increasing the count value of the level counter by a value proportional to the product of the length of a transmitted packet and a unitary increment value which is variable depend on the current count value of the level counter.

    摘要翻译: 流量整形器包括具有对应于缓冲存储器20-1至20-n准备的多个泄漏桶单元41-1至41-n的带宽控制器40以及用于指定缓冲存储器的输出队列指定单元43, 要读出一个数据包。 每个漏斗单元41具有用于以预定速率递减计数值的电平计数器416和用于将电平计数器的计数值增加与水平计数器的长度成比例的值的电平增加器411至417 发送数据包和可变的单位增量值取决于电平计数器的当前计数值。

    Cell buffer memory for a large capacity and high throughput ATM switch
    64.
    发明授权
    Cell buffer memory for a large capacity and high throughput ATM switch 失效
    用于大容量和高吞吐量ATM交换机的单元缓冲存储器

    公开(公告)号:US06249524B1

    公开(公告)日:2001-06-19

    申请号:US09044171

    申请日:1998-03-19

    IPC分类号: H04J324

    CPC分类号: H04L49/108 H04Q11/0478

    摘要: Provided is a high-throughput large-capacity ATM switch in which variation in memory access time and data output delay time generated in the case where a DRAM is used as a cell buffer of the ATM switch is absorbed. To realize this, the ATM switch comprises a first memory using a DRAM for storing cells, a second memory using an SRAM for switching and temporarily storing the cells before transferring the cells to the first memory, and a controller for generating write/read address and timing signals for the first and second memories. The controller generates read address and timing signals for the second memory and write address and timing signals for the first memory taking variation in access time or delay time based on access address of the first memory into account, so that the cells are output on destination output lines after the cells are switched and stored in the second memory and then stored in the first memory.

    摘要翻译: 提供了一种高吞吐量大容量ATM交换机,其中在将DRAM用作ATM交换机的小区缓冲器的情况下产生的存储器访问时间和数据输出延迟时间的变化被吸收。 为了实现这一点,ATM交换机包括使用用于存储单元的DRAM的第一存储器,使用SRAM的第二存储器,用于在将单元传送到第一存储器之前切换和临时存储单元;以及控制器,用于产生写/ 用于第一和第二存储器的定时信号。 控制器产生用于第二存储器的读取地址和定时信号,并且基于第一存储器的存取地址来考虑第一存储器的存取时间或延迟时间的变化的写入地址和定时信号,从而在目的地输出 将单元切换并存储在第二存储器中,然后存储在第一存储器中。