公开(公告)号：US08924605B2

公开(公告)日：2014-12-30

申请号：US13682773

申请日：2012-11-21

Applicant: Mellanox Technologies Ltd.

Inventor： Ofer Hayut ,  Noam Bloch ,  Michael Kagan ,  Ariel Shachar

IPC: G06F3/00 ,  G06F13/00 ,  G06F3/01 ,  H04L12/00 ,  H04L12/46

CPC classification number: G06F3/016 ,  G06F13/00 ,  H04L12/00 ,  H04L12/4641

Abstract: A computer peripheral device includes a host interface, which is configured to communicate over a bus with a host processor and with a system memory of the host processor. Processing circuitry in the peripheral device is configured to receive and execute work items submitted to the peripheral device by client processes running on the host processor, and responsively to completing execution of the work items, to generate completion reports and to write a plurality of the completion reports to the system memory via the bus together in a single bus transaction.

公开(公告)号：US20140247832A1

公开(公告)日：2014-09-04

申请号：US14277793

申请日：2014-05-15

Applicant: Mellanox Technologies Ltd.

Inventor： Ariel Shachar ,  Michael Kagan ,  Noam Bloch

IPC: H04L5/00

CPC classification number: H04L5/0055 ,  H04L47/10

Abstract: A method for communication, includes allocating, in a network interface controller (NIC) a single dynamically-connected (DC) initiator context for serving requests from an initiator process running on the initiator host to transmit data to multiple target processes running on one or more target nodes. The NIC transmits a first connect packet directed to a first target process and referencing the DC initiator context so as to open a first dynamic connection with the first target process. The NIC receives over the packet network, in response to the first connect packet, a first acknowledgment packet containing a first session identifier (ID). Following receipt of the first acknowledgment packet, the NIC transmits one or more first data packets containing the first session ID over the first dynamic connection from the NIC to the first target process. Dynamic connections with other target processes may subsequently be handled in similar fashion.

公开(公告)号：US20140129741A1

公开(公告)日：2014-05-08

申请号：US13670485

申请日：2012-11-07

Applicant: MELLANOX TECHNOLOGIES LTD.

Inventor： Ariel Shahar ,  Eyal Waldman ,  Michael Kagan ,  Noam Bloch

IPC: G06F13/14

CPC classification number: G06F13/382

Abstract: A method includes establishing in a peripheral device at least first and second communication links with respective first and second hosts. The first communication link is presented to the first host as the only communication link with the peripheral device, and the second communication link is presented to the second host as the only communication link with the peripheral device. The first and second hosts are served simultaneously by the peripheral device over the respective first and second communication links.

Abstract translation: 一种方法包括在外围设备中建立与相应的第一和第二主机的至少第一和第二通信链路。 将第一通信链路作为与外围设备的唯一通信链路呈现给第一主机，并且将第二通信链路作为与外围设备的唯一通信链路呈现给第二主机。 第一和第二主机由外围设备在相应的第一和第二通信链路上同时服务。

公开(公告)号：US20140095753A1

公开(公告)日：2014-04-03

申请号：US14033470

申请日：2013-09-22

Applicant: Mellanox Technologies Ltd.

Inventor： Diego Crupnicoff ,  Todd Wilde ,  Richard Graham ,  Michael Kagan

IPC: G06F13/28 ,  G06F13/40

CPC classification number: G06F13/4022 ,  G06F12/0835 ,  G06F13/28 ,  G06F13/36 ,  G06F13/4068 ,  G06F13/4282 ,  G11C7/1072

Abstract: A network interface device for a host computer includes a network interface, configured to transmit and receive data packets to and from a network. Packet processing logic transfers data to and from the data packets transmitted and received via the network interface by direct memory access (DMA) from and to a system memory of the host computer. A memory controller includes a first memory interface configured to be connected to the system memory and a second memory interface, configured to be connected to a host complex of the host computer. Switching logic alternately couples the first memory interface to the packet processing logic in a DMA configuration and to the second memory interface in a pass-through configuration.

Abstract translation: 用于主计算机的网络接口设备包括网络接口，被配置为向网络发送和从网络接收数据分组。 分组处理逻辑通过来自主计算机的系统存储器的直接存储器访问（DMA）经由网络接口​​传送和接收的数据分组传送数据。 存储器控制器包括被配置为连接到系统存储器的第一存储器接口和被配置为连接到主计算机的主机复合体的第二存储器接口。 开关逻辑将第一存储器接口交替地耦合到DMA配置中的分组处理逻辑，并以直通配置耦合到第二存储器接口。

公开(公告)号：US20140075436A1

公开(公告)日：2014-03-13

申请号：US14011767

申请日：2013-08-28

Applicant: Mellanox Technologies Ltd.

Inventor： Michael Kagan ,  Dror Goldenberg ,  Benny Koren ,  Michael Tsirkin

IPC: G06F9/455

CPC classification number: G06F9/45558 ,  G06F13/12

Abstract: A system and method for accelerating input/output (IO) access operation on a virtual machine, The method comprises providing a smart IO device that includes an unrestricted command queue (CQ) and a plurality of restricted CQs and allowing a guest domain to directly configure and control IO resources through a respective restricted CQ, the IO resources allocated to the guest domain. In preferred embodiments, the allocation of IO resources to each guest domain is performed by a privileged virtual switching element. In some embodiments, the smart IO device is a HCA and the privileged virtual switching element is a Hypervisor.

Abstract translation: 一种用于加速虚拟机上的输入/输出（IO）访问操作的系统和方法，该方法包括提供包括不受限制的命令队列（CQ）和多个受限CQ的智能IO设备，并允许来宾域直接配置 并通过相应的限制CQ来控制IO资源，分配给访客域的IO资源。 在优选实施例中，IO资源到每个访客域的分配由特权虚拟交换元件执行。 在一些实施例中，智能IO设备是HCA，并且特权虚拟交换元件是管理程序。