公开(公告)号：US12141442B2

公开(公告)日：2024-11-12

申请号：US18502764

申请日：2023-11-06

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Luca Bert

IPC: G06F3/06 ,  G06F12/02

Abstract: An input/output (I/O) write request directed at memory devices is received by a processing device. The write request includes a data object. The memory devices include groups of memory cells corresponding to sequential logical addresses. The data object is appended to a compound data object associated with one of the memory devices. The compound data object is associated with the groups of memory cells. A first group of memory cells is in the not-full state, and one or more subsequent, in an order corresponding to the sequential logical addresses, groups of memory cells is identified as a free group of memory cells. The compound data object is caused to be written to the groups of memory cells, resulting in the full state of the first group of memory cells and resulting in the not-full state of at least one of the one or more subsequent groups of memory.

公开(公告)号：US20240370207A1

公开(公告)日：2024-11-07

申请号：US18778482

申请日：2024-07-19

Applicant: Micron Technology, Inc.

Inventor： Joseph Harold Steinmetz ,  Luca Bert

IPC: G06F3/06

Abstract: A memory sub-system, such as a solid state drive (SSD), having host interface configured to receive at least read commands and write commands from an external host system. The SSD has memory cells formed on at least one integrated circuit die, and a processing device configured to control executions of the read commands to retrieve data from the memory cells and executions the write commands to store data into the memory cells. During a burn-in operation of the memory sub-system in a manufacturing facility, the memory sub-system is configured to perform read/write operations for the generation of a proof of space plot. After the burn-in operation, the memory sub-system is provided as a product of the manufacturing facility; and the proof of space plot stored in the memory sub-system is provided as a by-product of the burn-in operation.

公开(公告)号：US12118220B2

公开(公告)日：2024-10-15

申请号：US18200685

申请日：2023-05-23

Applicant: Micron Technology, Inc.

Inventor： Joseph H. Steinmetz ,  Luca Bert ,  William Akin

IPC: G06F3/06 ,  G06F12/0808

CPC classification number: G06F3/0631 ,  G06F3/0604 ,  G06F3/0644 ,  G06F3/068 ,  G06F12/0808 ,  G06F2212/1044

Abstract: A system includes a memory and at least one processing device, operatively coupled to the memory, to perform operations including causing a region of a non-volatile memory device to be accessible through a persistent memory region (PMR) of a volatile memory device. The PMR utilizes a power protection mechanism to prevent data loss in an event of power loss.

公开(公告)号：US20240320029A1

公开(公告)日：2024-09-26

申请号：US18590807

申请日：2024-02-28

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Luca Bert

IPC: G06F9/455

CPC classification number: G06F9/45558 ,  G06F2009/45583

Abstract: A memory system includes a memory device and a processing device coupled to the memory device, the processing device is to create a namespace by allocating a reclaim group, the reclaim group comprising a plurality of reclaim units; assign a reclaim unit handle to the namespace; receive, from a virtual machine running on a host computing system, a command to perform an operation associated with the namespace; identify a segment of the memory device based on the reclaim unit handle that is assigned to the namespace; and perform the operation on the segment of the memory device.

公开(公告)号：US20240289270A1

公开(公告)日：2024-08-29

申请号：US18439684

申请日：2024-02-12

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F12/02 ,  G06F9/54 ,  G06F12/0815

CPC classification number: G06F12/0246 ,  G06F9/544 ,  G06F12/0815

Abstract: Memory sub-systems configured to run file system managers and to provide file services via memory services. For example, a connection from a memory sub-system to the host system can support both a cache-coherent memory access protocol to a memory device attached by the memory sub-system to the host system and a storage access protocol to a storage device attached by the memory sub-system to the host system. A messaging channel through the memory device can be used for an operating system running in the host system to communicate with a file system manager running in the memory sub-system to access the file system. For example, a hypertext transfer protocol (HTTP) representational state transfer (REST) application programming interface (API) can be implemented for the host system to access the file system in the memory sub-system.

公开(公告)号：US20240264750A1

公开(公告)日：2024-08-08

申请号：US18432578

申请日：2024-02-05

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F3/06 ,  G06F12/0815

CPC classification number: G06F3/0619 ,  G06F3/0659 ,  G06F3/0679 ,  G06F12/0815

Abstract: A computing device having a computer express link (CXL) connection between a memory sub-system and a host system and a flag configured to indicate an atomic operation being in progress in the memory sub-system. Over the connection, the memory sub-system can attach a portion of its fast, random access memory as a memory device, and a non-volatile memory as a storage device. The flag is set in the memory device accessible to the host system via a cache-coherent memory access protocol, before execution of commands of the atomic operation. After the completion of the atomic operation, the flag is cleared off the memory device. During a recovery from an interruption, the host system can check the flag to decide whether to restart or start the atomic operation again, or undo the partially executed the atomic operation.

公开(公告)号：US12050945B2

公开(公告)日：2024-07-30

申请号：US17866341

申请日：2022-07-15

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F9/54 ,  G06F13/16

CPC classification number: G06F9/546 ,  G06F13/1668

Abstract: A standalone storage product having: a first bus connector for connecting to an external processor; a second bus connector for connecting to an external network interface; a storage device accessible over the network interface; and a processing device configured to communicate, via the second bus connector, with the network interface to obtain storage access messages represented by incoming packets received at the network interface from a computer network. The processing device can: identify, from the storage access messages, first messages and second messages; provide, the first messages via the first bus connector, to the processor; and provide, the second messages, to the storage device without the second messages going through the processor. The storage device is configured to: receive, via the first bus connector, third messages from the processor; and execute commands in the second messages and the third messages to implement a network storage service.

公开(公告)号：US12045504B2

公开(公告)日：2024-07-23

申请号：US17550773

申请日：2021-12-14

Applicant: Micron Technology, Inc.

Inventor： Joseph Harold Steinmetz ,  Luca Bert

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0622 ,  G06F3/0632 ,  G06F3/0644 ,  G06F3/0679

Abstract: A memory sub-system, such as a solid state drive (SSD), having host interface configured to receive at least read commands and write commands from an external host system. The SSD has memory cells formed on at least one integrated circuit die, and a processing device configured to control executions of the read commands to retrieve data from the memory cells and executions the write commands to store data into the memory cells. During a burn-in operation of the memory sub-system in a manufacturing facility, the memory sub-system is configured to perform read/write operations for the generation of a proof of space plot. After the burn-in operation, the memory sub-system is provided as a product of the manufacturing facility; and the proof of space plot stored in the memory sub-system is provided as a by-product of the burn-in operation.

公开(公告)号：US12045118B2

公开(公告)日：2024-07-23

申请号：US18231334

申请日：2023-08-08

Applicant: Micron Technology, Inc.

Inventor： Luca Bert ,  Joseph H. Steinmetz

IPC: G06F11/07 ,  G06F3/06 ,  G06F11/30

CPC classification number: G06F11/0727 ,  G06F3/0619 ,  G06F3/0629 ,  G06F3/0659 ,  G06F3/067 ,  G06F11/0772 ,  G06F11/3034

Abstract: Operations include identifying a system failure affecting visibility, to at least one dual port node of a plurality of dual port nodes, of at least one of a first volume of a plurality of volumes of a first memory device or a second volume of the plurality of volumes, and modifying a visibility configuration to address the system failure. Each volume of the plurality of volumes includes a persistent memory region (PMR). Modifying the visibility configuration includes modifying the visibility of at least one of the first volume or the second volume to the at least one dual port node of the plurality of dual port nodes through its first port or its second port via the at least one switch domain of the plurality of switch domains.

公开(公告)号：US20240192883A1

公开(公告)日：2024-06-13

申请号：US18582528

申请日：2024-02-20

Applicant: Micron Technology, Inc.

Inventor： Luca Bert ,  Joseph Harold Steinmetz

IPC: G06F3/06

CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0631 ,  G06F3/0679

Abstract: An apparatus with a solid state drive (SSD) having firmware to manage spare storage resources for proof of space activities. The SSD has a host interface configured to receive at least read commands and write commands from an external host system. The SSD has memory cells formed on at least one integrated circuit die, and a processing device configured to control executions of the read commands to retrieve data from the memory cells and executions the write commands to store data into the memory cells. The firmware is executable in the SSD to allocate storage resources not used or allocated by the host system to support proof of space activities and dynamically return the allocated storage resources when execution of a command from the host system needs additional storage resources.