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61.
公开(公告)号:US20200210015A1
公开(公告)日:2020-07-02
申请号:US16237754
申请日:2019-01-02
Applicant: NOVATEK Microelectronics Corp.
Inventor: Huan-Teng Cheng , Huang-Chin Tang
Abstract: A method of controlling timing for a touch and display driver system includes the steps of: receiving an external signal; generating a plurality of time units each having a display period and a touch period; generating an internal signal for controlling a display operation in the display period; and synchronizing the internal signal with the external signal for a time unit among the plurality of time units at a time point different from at least one of the start of the time unit and the end of the time unit.
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公开(公告)号:US10699635B2
公开(公告)日:2020-06-30
申请号:US16045757
申请日:2018-07-26
Applicant: Novatek Microelectronics Corp.
Inventor: Ko-Fang Chen , Huang-Chin Tang
IPC: G09G3/3233
Abstract: A power management device including a power management circuit is provided. The power management circuit is configured to output a first power signal and a second power signal to a pixel circuit of a display panel. The pixel circuit includes an organic light-emitting diode. The organic light-emitting diode includes an anode terminal and a cathode terminal. The anode terminal is coupled to the first power signal. The cathode terminal is coupled to the second power signal. The second power signal is an alternating-current voltage. In addition, a pixel circuit of a display panel, and a power management method for the pixel circuit of the display panel are also provided.
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公开(公告)号:US09960151B2
公开(公告)日:2018-05-01
申请号:US15226905
申请日:2016-08-02
Applicant: Novatek Microelectronics Corp.
Inventor: Chieh-Hsiang Chang , Wen-Ching Huang , Kuo-Yuan Lu , Huang-Chin Tang
IPC: G02F1/1345 , H01L25/16 , H01L23/498 , H01L23/00 , H01L23/552 , H01L23/373
CPC classification number: H01L25/167 , G02F1/13452 , G02F1/13458 , H01L23/373 , H01L23/49838 , H01L23/4985 , H01L23/552 , H01L23/562 , H01L24/14 , H01L24/16 , H01L2224/1403 , H01L2224/16165
Abstract: A semiconductor device includes a chip, a plurality of first bumps, and a plurality of second bumps. The chip includes an active surface. The first bumps are disposed on the active surface along a first direction. The second bumps are disposed on the active surface along a second direction parallel to the first direction, wherein one of the second bumps is located between adjacent two of the first bumps, a closest distance from the second bumps to the fan-out region is smaller than a closest distance from the first bumps to the fan-out region, and a first width of one of the first bumps is larger than a second width of one of the second bumps.
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公开(公告)号:US20180040596A1
公开(公告)日:2018-02-08
申请号:US15226905
申请日:2016-08-02
Applicant: Novatek Microelectronics Corp.
Inventor: Chieh-Hsiang Chang , Wen-Ching Huang , Kuo-Yuan Lu , Huang-Chin Tang
IPC: H01L25/16 , H01L23/373 , H01L23/552 , H01L23/498 , H01L23/00
CPC classification number: H01L25/167 , G02F1/13452 , G02F1/13458 , H01L23/373 , H01L23/49838 , H01L23/4985 , H01L23/552 , H01L23/562 , H01L24/14 , H01L24/16 , H01L2224/1403 , H01L2224/16165
Abstract: A semiconductor device includes a chip, a plurality of first bumps, and a plurality of second bumps. The chip includes an active surface. The first bumps are disposed on the active surface along a first direction. The second bumps are disposed on the active surface along a second direction parallel to the first direction, wherein one of the second bumps is located between adjacent two of the first bumps, a closest distance from the second bumps to the fan-out region is smaller than a closest distance from the first bumps to the fan-out region, and a first width of one of the first bumps is larger than a second width of one of the second bumps.
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