公开(公告)号：US06660611B2

公开(公告)日：2003-12-09

申请号：US10010842

申请日：2001-12-07

申请人： Randhir P. S. Thakur ,  Gordon Haller ,  Kirk D. Prall

发明人： Randhir P. S. Thakur ,  Gordon Haller ,  Kirk D. Prall

IPC分类号： H01L2120

CPC分类号： H01L28/87 ,  H01L28/55 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming a corrugated capacitor on a semiconductor component. The method of forming the corrugated capacitor comprises a series of depositing alternating layers of doped silicon glass having different etch rates on a semiconductor component, covering the alternating layers with an etch-resistant material, and etching the alternating layers, thereby forming a capacitor structure having corrugated sides.

摘要翻译： 一种在半导体部件上形成波纹状电容器的方法。 形成波纹状电容器的方法包括在半导体组件上具有不同蚀刻速率的一系列沉积交替层的掺杂硅玻璃，用耐蚀刻材料覆盖交替层，并蚀刻交替层，从而形成具有 波纹状。

公开(公告)号：US6060783A

公开(公告)日：2000-05-09

申请号：US225593

申请日：1999-01-06

申请人： Werner Juengling ,  Kirk Prall ,  Gordon Haller ,  David Keller ,  Tyler Lowrey

发明人： Werner Juengling ,  Kirk Prall ,  Gordon Haller ,  David Keller ,  Tyler Lowrey

IPC分类号： H01L21/28 ,  H01L21/60 ,  H01L21/768 ,  H01L21/8242 ,  H01L23/485 ,  H01L23/48

CPC分类号： H01L27/10888 ,  H01L21/28 ,  H01L21/768 ,  H01L21/76897 ,  H01L23/485 ,  H01L2924/0002 ,  Y10S438/978

摘要： Within an integrated circuit, a contact plug with a height not extending above the level of the gate/wordline nitride is nonetheless provided with a relatively large contact area or landing pad, significantly larger than the source/drain region to which the contact plug is electrically connected. Methods for producing the inventive contact plug include (1) use of a nitride facet etch, either (a) during a nitride spacer formation etch or (b) during a BPSG etch; (2) using at least one of (a) an isotropic photoresist etch or partial descum to narrow BPSG spacers above the gate/wordline nitride, and (b) a nitride step etch to etch the shoulder area of the gate/wordline nitride exposed by a BPSG etch; and (3) polishing a BPSG layer down to the top of a gate/wordline nitride before any doped polysilicon plug fill, masking for BPSG etch and performing a BPSG etch, etching the photoresist layer through a partial descum, and etching the shoulder area of the gate/wordline nitride exposed thereby.

摘要翻译： 在集成电路中，具有不延伸在栅极/字线氮化物的高度之上的高度的接触插塞仍然设置有相对较大的接触面积或着陆焊盘，其明显大于接触插塞电接触的源极/漏极区域 连接的。 用于制造本发明接触塞的方法包括（1）在氮化物间隔物形成蚀刻期间使用氮化物刻面蚀刻（a）或（b）在BPSG蚀刻期间; （2）使用（a）各向同性光致抗蚀剂蚀刻或部分除去中的至少一种来窄化栅极/字线氮化物之上的BPSG间隔区，以及（b）氮化物步骤蚀刻以蚀刻暴露于栅极/字线氮化物的肩部区域 BPSG蚀刻; 并且（3）在任何掺杂的多晶硅插塞填充之前将BPSG层向下抛光到栅极/字线氮化物的顶部，掩蔽用于BPSG蚀刻和执行BPSG蚀刻，通过部分除去蚀刻光致抗蚀剂层，并蚀刻 栅极/字线氮化物被曝光。