公开(公告)号：US08503196B2

公开(公告)日：2013-08-06

申请号：US12838988

申请日：2010-07-19

Applicant: Liang-Pin Tai ,  Tzu-Chen Lin ,  Cheng-Hsuan Fan

Inventor： Liang-Pin Tai ,  Tzu-Chen Lin ,  Cheng-Hsuan Fan

IPC: H02M3/335 ,  H02M1/36

CPC classification number: H02M3/33523

Abstract: A feedback circuit for an isolated power converter includes an opto-coupler and a reversed polarity regulator. The opto-coupler provides a current related to an output voltage of the isolated power converter. When the isolated power converter enters light load, the output voltage rises and the reversed polarity regulator reduces the current to decrease the power consumption and thus improve the light load efficiency of the isolated power converter.

Abstract translation: 用于隔离电力转换器的反馈电路包括光耦合器和反极性调节器。 光耦合器提供与隔离功率转换器的输出电压相关的电流。 当隔离电源转换器进入轻负载时，输出电压升高，反极性调节器降低电流以降低功耗，从而提高隔离电源转换器的轻负载效率。

公开(公告)号：US07838901B2

公开(公告)日：2010-11-23

申请号：US12385719

申请日：2009-04-17

Applicant: Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

Inventor： Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

IPC: H01L29/74 ,  H01L31/111

CPC classification number: H01L27/098 ,  H01L27/0744 ,  H01L29/7722 ,  H01L29/8083

Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.

公开(公告)号：US20090230932A1

公开(公告)日：2009-09-17

申请号：US12382017

申请日：2009-03-06

Applicant: Ting-Hung Wang ,  Chia-Jung Lee ,  Liang-Pin Tai

Inventor： Ting-Hung Wang ,  Chia-Jung Lee ,  Liang-Pin Tai

IPC: G05F1/10

CPC classification number: H02M3/1584 ,  H02M2003/1566

Abstract: A per-phase quick response generation circuit generates a quick response signal to determine a quick response pulse to be inserted into a pulse width modulation signal of the corresponding phase. The quick response pulse will force the upper power switch of the corresponding phase on to increase the current supply ability during load transition. A multi-phase voltage regulator with the quick response generation circuit can have different quick response pulse widths for the interleaved phases, so as to decrease the current imbalance period of the voltage regulator after load transition.

Abstract translation: 每相快速响应发生电路产生快速响应信号以确定要插入相应相位的脉宽调制信号的快速响应脉冲。 快速响应脉冲将强制相应相位的上电源开关增加负载转换期间的电流供应能力。 具有快速响应发生电路的多相电压调节器可以对交错相位具有不同的快速响应脉冲宽度，从而减小负载转换后电压调节器的电流不平衡周期。

公开(公告)号：US20090206921A1

公开(公告)日：2009-08-20

申请号：US12385717

申请日：2009-04-17

Applicant: Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

Inventor： Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

IPC: G05F3/02

CPC classification number: H01L27/098 ,  H01L27/0744 ,  H01L29/7722 ,  H01L29/8083

Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.

公开(公告)号：US07576588B2

公开(公告)日：2009-08-18

申请号：US11498240

申请日：2006-08-03

Applicant: Ko-Cheng Wang ,  Liang-Pin Tai

Inventor： Ko-Cheng Wang ,  Liang-Pin Tai

IPC: H03K17/687 ,  H03K17/04 ,  G11C5/14

CPC classification number: H03K17/693 ,  H03K17/04123 ,  H03K17/0414

Abstract: A quick turn on apparatus and method for a NMOSFET switch are used to maintain the gate voltage of the NMOSFET switch non-zero but not enough to turn on the NMOSFET switch, such that the NMOSFET switch turns on more quickly when it is to be turned on. Seamless transition can be further achieved in a single pole double throw switching circuit by using the quick turn on apparatus and method.

Abstract translation: 用于NMOSFET开关的快速启动装置和方法用于将NMOSFET开关的栅极电压保持为非零，但不足以导通NMOSFET开关，使得NMOSFET开关在其被转动时更快地接通 上。 通过使用快速打开设备和方法，可以在单刀双掷切换电路中进一步实现无缝转换。

公开(公告)号：US07560917B2

公开(公告)日：2009-07-14

申请号：US11220561

申请日：2005-09-08

Applicant: Hsin-Hsin Ho ,  Liang-Pin Tai ,  Hung-I Wang ,  Jian-Rong Huang ,  Jiun-Chiang Chen

Inventor： Hsin-Hsin Ho ,  Liang-Pin Tai ,  Hung-I Wang ,  Jian-Rong Huang ,  Jiun-Chiang Chen

IPC: G05F1/618

CPC classification number: H02M3/158 ,  H02M2001/0019

Abstract: In a voltage regulator including an error amplifier to generate a first signal related to an output voltage of the voltage regulator, a current sense circuit to generate a second signal related to an inductor current of the voltage regulator, and a PWM comparator to generate a PWM signal in response to the first and second signals to regulate the output voltage, a current feed-through adaptive voltage position control comprises supplying ramp signal and offset signal to modify the PWM signal to thereby eliminate the offset of the output voltage.

Abstract translation: 在包括用于产生与电压调节器的输出电压相关的第一信号的误差放大器的电压调节器中，产生与电压调节器的电感器电流相关的第二信号的电流感测电路和用于产生PWM的PWM比较器 信号响应于第一和第二信号以调节输出电压，电流馈通自适应电压位置控制包括提供斜坡信号和偏移信号以修改PWM信号，从而消除输出电压的偏移。

公开(公告)号：US07489182B2

公开(公告)日：2009-02-10

申请号：US11749872

申请日：2007-05-17

Applicant: Hung-Che Chou ,  Chao-Hsuan Chuang ,  Cheng-Hsuan Fan ,  Liang-Pin Tai

Inventor： Hung-Che Chou ,  Chao-Hsuan Chuang ,  Cheng-Hsuan Fan ,  Liang-Pin Tai

IPC: G05F1/10

CPC classification number: G11C5/145

Abstract: The present invention discloses a charge pump start up circuit comprising: a start up transistor having one end which is electrically connected with a voltage supply source, and another end which is electrically connected to a voltage node; and a charge pump circuit having an input which is electrically connected with the voltage node, and an output which is electrically with the gate of the start up transistor.

Abstract translation: 本发明公开了一种电荷泵起动电路，包括：起动晶体管，其一端与电压源电连接，另一端电连接到电压节点; 以及具有与电压节点电连接的输入的电荷泵电路，以及与启动晶体管的栅极电连接的输出。

公开(公告)号：US20080284503A1

公开(公告)日：2008-11-20

申请号：US11749872

申请日：2007-05-17

Applicant: Hung-Che Chou ,  Chao-Hsuan Chuang ,  Cheng-Hsuan Fan ,  Liang-Pin Tai

Inventor： Hung-Che Chou ,  Chao-Hsuan Chuang ,  Cheng-Hsuan Fan ,  Liang-Pin Tai

IPC: G11C5/14

CPC classification number: G11C5/145

Abstract: The present invention discloses a charge pump start up circuit comprising: a start up transistor having one end which is electrically connected with a voltage supply source, and another end which is electrically connected to a voltage node; and a charge pump circuit having an input which is electrically connected with the voltage node, and an output which is electrically with the gate of the start up transistor.

Abstract translation: 本发明公开了一种电荷泵起动电路，包括：起动晶体管，其一端与电压源电连接，另一端电连接到电压节点; 以及具有与电压节点电连接的输入的电荷泵电路，以及与启动晶体管的栅极电连接的输出。

公开(公告)号：US07274246B2

公开(公告)日：2007-09-25

申请号：US11159245

申请日：2005-06-23

Applicant: Liang-Pin Tai ,  Jiun-Chiang Chen

Inventor： Liang-Pin Tai ,  Jiun-Chiang Chen

IPC: H03K17/687

CPC classification number: H03K17/6871 ,  H03K17/693

Abstract: A switching circuit uses multiple common-drain JFETs to serve as the low-side switches of the switching circuit, and each of the low-side JFET is coupled between a high-side switch and a power node. Since a JFET can endure high voltage at both drain side and source side, and has good heat dissipation capability at drain side, the drain of the low-side JFET is coupled to the power node to enhance the heat dissipation capability and accordingly, all the low-side JFETs are allowed to be packaged in a same package to reduce the PCB layout area.

Abstract translation: 开关电路使用多个公共漏极JFET作为开关电路的低侧开关，并且每个低侧JFET耦合在高侧开关和功率节点之间。 由于JFET可以在漏极侧和源极侧承受高电压，并且在漏极侧具有良好的散热能力，因此低边JFET的漏极耦合到电源节点以增强散热能力，因此， 低边JFET可以封装在相同的封装中，以减少PCB布局面积。

公开(公告)号：US20070147099A1

公开(公告)日：2007-06-28

申请号：US11708325

申请日：2007-02-21

Applicant: Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

Inventor： Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

IPC: H02M7/537

CPC classification number: H02M3/158 ,  H02M3/155 ,  H03K17/063 ,  H03K17/6871 ,  H03K17/693 ,  H03K2017/6875

Abstract: Electronic circuits use low-cost depletion-mode JFET to serve as power switch. Since depletion-mode JFET has smaller conductive resistance and is majority carrier device, the energy loss is less when current flows through the depletion-mode JFET, and faster switching speed is obtained, thereby enhancing the efficiency of the electronic circuits.