公开(公告)号：US12177832B2

公开(公告)日：2024-12-24

申请号：US17625072

申请日：2020-03-11

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Tetsuya Yamamoto ,  Ankit Bhamri ,  Hidetoshi Suzuki ,  Rikin Shah ,  Hongchao Li

IPC: H04W72/1268 ,  H04L1/1812 ,  H04L5/00 ,  H04W72/23 ,  H04W72/566

Abstract: This terminal is provided with: a control circuit that, on the basis of information relating to the priority degrees of a plurality of uplink signals, determines at least one uplink signal to be transmitted in some transmission resource in a time domain among the plurality of uplink signals; and a transmission circuit that transmits the determined uplink signal in the transmission resource.

公开(公告)号：US12177027B2

公开(公告)日：2024-12-24

申请号：US18488845

申请日：2023-10-17

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ankit Bhamri ,  Hidetoshi Suzuki ,  Hongchao Li ,  Madhav Gupta

IPC: H04L1/1812 ,  H04L5/00 ,  H04W72/1273 ,  H04W92/24

Abstract: The present disclosure relates to a user equipment, a network node and respective communication methods for a user equipment and a network node. A according to some embodiments, a user equipment comprises a transceiver which, in operation, receives data on a plurality of downlink shared channels, the data received on the plurality of downlink shared channels being respectively the same data, and circuitry which, in operation, decodes the data, generates an indicator which indicates whether or not the data has been successfully decoded using the plurality of downlink shared channels. The transceiver, in operation, transmits the indicator on at least one of a plurality of uplink control channels associated respectively with the plurality of downlink shared channels.

公开(公告)号：US20240422815A1

公开(公告)日：2024-12-19

申请号：US18816599

申请日：2024-08-27

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ankit BHAMRI ,  Hidetoshi SUZUKI ,  Rikin SHAH ,  Ming-Hung TAO ,  Hongchao LI ,  Tetsuya YAMAMOTO

IPC: H04W72/566 ,  H04W72/121 ,  H04W72/23

Abstract: The present disclosure relates to a user equipment, a base station, and uplink transmission and reception methods. The user equipment comprises a transceiver which, in operation, receives an indication indicating a priority level to be enforced, and circuitry which, in operation, compares a priority level of a first uplink transmission with the indicated priority level to be enforced, the first uplink transmission being granted to the UE prior to scheduling of a second uplink transmission allocated to resources overlapping with resources allocated to the first uplink transmission, wherein the transceiver, in operation, performs the first uplink transmission based on a result of the comparison.

公开(公告)号：US20240422783A1

公开(公告)日：2024-12-19

申请号：US18823255

申请日：2024-09-03

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Tetsuya YAMAMOTO ,  Hidetoshi SUZUKI ,  Yoshihiko OGAWA

IPC: H04W72/20 ,  H04L5/00

Abstract: A terminal with which it is possible to appropriately transmit uplink control information. In a terminal (200), a reception unit (202) receives first control information relating to an uplink data channel, and a second control information relating to an uplink control channel for transmitting uplink control information. The first control information includes first indication information indicating the presence or absence of an uplink data transmission and second indication information indicating the presence or absence a channel state information transmission. A transmission unit (220) transmits uplink control information using the resource of the uplink data channel when the first indication information indicates that there is no uplink data transmission and the second indication information indicates that there is no channel state information transmission.

公开(公告)号：US20240422343A1

公开(公告)日：2024-12-19

申请号：US18817774

申请日：2024-08-28

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya LI ,  Chong Soon LIM ,  Ru Ling LIAO ,  Han Boon TEO ,  Hai Wei SUN ,  Che Wei KUO ,  Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA

IPC: H04N19/513 ,  H04N19/139 ,  H04N19/159 ,  H04N19/176

Abstract: Provided is an encoder including circuitry and memory coupled to the circuitry. A prediction mode for a current block is an affine mode, and in operation, the circuitry: derives a base motion vector which is a motion vector to be used in a prediction process for the current block, and is a motion vector at an affine-mode control point in the current block; derives a first motion vector different from the base motion vector; derives a motion vector difference based on a difference between the base motion vector and the first motion vector; determines whether the motion vector difference is greater than a threshold; if so, modifies a second motion vector different from the base motion vector and the first motion vector, and if not, does not modify the second motion vector; and encodes the current block using the second motion vector modified or the second motion vector not modified.

公开(公告)号：US12170587B2

公开(公告)日：2024-12-17

申请号：US18130043

申请日：2023-04-03

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Yutaka Murakami ,  Tomohiro Kimura ,  Mikihiro Ouchi

IPC: H04L27/26 ,  H04B7/0413 ,  H04J11/00 ,  H04L5/00 ,  H04B7/10

Abstract: A transmitting apparatus according to one aspect of the present disclosure transmits a plurality of first transmission data and a plurality of second transmission data by using an OFDM (Orthogonal Frequency-Division Multiplexing) method. The transmitting apparatus includes frame configuring circuitry, which in operation, generates a frame including a first period in which a preamble is transmitted, a second period in which the plurality of first transmission data is multiplexed by a time division multiplexing method and is transmitted, and a third period in which the plurality of second transmission data is multiplexed by a frequency division multiplexing method and is transmitted; and transmitting circuitry that transmits the frame.

公开(公告)号：US20240414596A1

公开(公告)日：2024-12-12

申请号：US18704001

申请日：2022-10-04

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jun MINOTANI ,  Takashi IWAI ,  Yoshio URABE

IPC: H04W28/18 ,  H04W16/14 ,  H04W72/0453 ,  H04W72/27

Abstract: This access point comprises: a control circuit that determines channel information pertaining to control of cooperative communication, such determination being on the basis of a channel which is allocated to each of a plurality of access points in non-cooperative communication; and a transmission circuit that transmits channel information to another access point.

公开(公告)号：US12167032B2

公开(公告)日：2024-12-10

申请号：US17353148

申请日：2021-06-21

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Toshiyasu Sugio ,  Noritaka Iguchi

IPC: H01L29/94 ,  H04N19/124 ,  H04N19/597

Abstract: A three-dimensional data encoding method includes: calculating coefficient values from pieces of attribute information of three-dimensional points included in point cloud data; generating a second code sequence including first information and second information, the first information indicating a total number of zero coefficient values consecutive in a first code sequence in which the coefficient values are arranged, the second information indicating whether each of the coefficient values is 0, the zero coefficient values being included in the coefficient values and having a value of 0; and generating a bitstream including the second code sequence.

公开(公告)号：US12166982B2

公开(公告)日：2024-12-10

申请号：US18343393

申请日：2023-06-28

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon Lim ,  Hai Wei Sun ,  Sughosh Pavan Shashidhar ,  Han Boon Teo ,  Ru Ling Liao ,  Takahiro Nishi ,  Tadamasa Toma

IPC: H04N19/119 ,  H04N19/176 ,  H04N19/50 ,  H04N19/60

Abstract: An encoder according to one aspect of the present disclosure encodes a block of an image, and includes a processor and memory connected to the processor. Using the memory, the processor partitions a block into a plurality of sub blocks and encodes a sub block included in the plurality of sub blocks in an encoding process including at least a transform process or a prediction process. The block is partitioned using a multiple partition including at least three odd-numbered child nodes and each of a width and a height of each of the plurality of sub blocks is a power of two.

公开(公告)号：US12160396B2

公开(公告)日：2024-12-03

申请号：US18158353

申请日：2023-01-23

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ayako Horiuchi ,  Hidetoshi Suzuki

IPC: H04L5/00 ,  H04W72/044 ,  H04W72/23

Abstract: In a base station, a DCI generation unit selects one pattern (mode) for use when data is allocated from among a plurality of patterns (modes) of a resource area where data (PDSCH) is allocated, and a transmission unit provides notification about setting information regarding the plurality of patterns (modes) by signaling of a higher layer and provides notification about the one pattern (mode) selected from the plurality of patterns by a downlink control signal (DCI).