公开(公告)号：US5170130A

公开(公告)日：1992-12-08

申请号：US762903

申请日：1991-09-19

申请人： Masaki Ichihara

发明人： Masaki Ichihara

IPC分类号： H03L7/18 ,  H03L7/089 ,  H03L7/10 ,  H03L7/107 ,  H03L7/183

CPC分类号： H03L7/0891 ,  H03L7/107 ,  H03L7/183

摘要： A phase lock loop circuit comprising a charge pump circuit (13), a loop filter (14), and a voltage controlled oscillator (15), a subsidiary loop filter (20) connected to the charge pump circuit and the loop filter in a phase lock operation through first and second switching circuits (21) and (22). The loop filter comprises a filter capacitor (C1) and delivers a filtered signal to the voltage controlled oscillator. In the phase lock operation, the subsidiary loop filter reduces a charge duration and a discharge duration of the filter capacitor. As a result, a voltage of the filtered signal varies rapidly and the phase lock operation is carried out in high speed.