公开(公告)号：US10958593B2

公开(公告)日：2021-03-23

申请号：US16118086

申请日：2018-08-30

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Jeremy Chritz ,  Tamara Schmitz ,  John L. Watson ,  John Schroeter ,  Fa-Long Luo ,  Jaime Cummins

IPC: H04W4/00 ,  H04L12/933 ,  H04B7/04 ,  H04W4/80 ,  H04B5/00 ,  H04W40/06 ,  H04L12/947 ,  H04L12/931 ,  H04W84/04

Abstract: An apparatus is disclosed. The apparatus comprises a plurality of antennas and an integrated circuit chip coupled to the plurality of antennas, and is configured to process cellular signals received from the plurality of antennas in accordance with a cellular communication protocol and to process radio frequency identification (RFID) signals received from the plurality of antennas in accordance with an RFID protocol.

公开(公告)号：US10716110B2

公开(公告)日：2020-07-14

申请号：US15693122

申请日：2017-08-31

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Fa-Long Luo ,  Jaime Cummins ,  Tamara Schmitz ,  Jeremy Chritz

IPC: H04W72/04 ,  H04W72/08 ,  H04B10/2575 ,  H04W88/08 ,  H04L29/08

Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of configuration modes for baseband units (BBU) and remote radio heads (RRH). For example, a computing system including a BBU and a RRH may receive a configuration mode selection including information indicative of a configuration mode for respective processing units of the BBU and the RRH. The computing system may allocate the respective processing units to perform wireless processing stages associated with a wireless protocol. The BBU and/or the RRH may generate an output data stream based on the mixing of coefficient data with input data at the BBU and/or the RRH. Examples of systems and methods described herein may facilitate the processing of data for 5G (e.g., New Radio (NR)) wireless communications in a power-efficient and time-efficient manner.

公开(公告)号：US10684955B2

公开(公告)日：2020-06-16

申请号：US15493505

申请日：2017-04-21

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Fa-Long Luo ,  Tamara Schmitz ,  Jeremy Chritz ,  Jaime Cummins

IPC: G06F12/10 ,  G06F12/02

Abstract: Examples described herein include systems and methods which include an apparatus comprising a memory array including a plurality of memory cells and a memory controller coupled to the memory array. The memory controller comprises a memory mapper configured to configure a memory map on the basis of a memory command associated with a memory access operation. The memory map comprises a specific sequence of memory access instructions to access at least one memory cell of the memory array. For example, the specific sequence of memory access instructions for a diagonal memory command comprises a sequence of memory access instructions that each access a memory cell along a diagonal of the memory array.

公开(公告)号：US10476559B2

公开(公告)日：2019-11-12

申请号：US15600420

申请日：2017-05-19

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Fa-Long Luo ,  Jeremy Chritz ,  Tamara Schmitz ,  Jaime Cummins

IPC: H04L27/06 ,  H04B7/0413 ,  H04B7/08

Abstract: Examples described herein include apparatuses and methods to perform adaptive spatial diversity in a MIMO system. An example apparatus may include a plurality of receiving antennas and a wireless receiver configured to receive a respective plurality of receive signals each from a respective receiving antenna of the plurality of receiving antennas. The wireless signal may be further configured to apply a corresponding weight to each of the plurality of signals to provide a plurality of weighted signals and to apply an eigenfilter to the plurality of weighted signals provide a transfer function. The wireless receiver further configured to perform a fast Fourier transform (FFT) on the transfer function to provide output signals in the frequency domain.

公开(公告)号：US20190165999A1

公开(公告)日：2019-05-30

申请号：US15827460

申请日：2017-11-30

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Fa-Long Luo ,  Jaime Cummins ,  Tamara Schmitz ,  Jeremy Chritz

IPC: H04L12/24 ,  H04L29/08

Abstract: Examples described herein include methods, devices, and systems which may implement different processing stages for wireless communication in processing units. Such data processing may include a source data processing stage, a baseband processing stage, a digital front-end processing stage, and a radio frequency (RF) processing stage. Data may be received from a sensor of device and then processed in the stages to generate output data for transmission. Processing the data in the various stages may occur during an active time period of a discontinuous operating mode. During the active time period, a reconfigurable hardware platform may allocate all or a portion of the processing units to implement the processing stages. Examples of systems and methods described herein may facilitate the processing of data for 5G (e.g., New Radio (NR)) wireless communications in a power-efficient and time-efficient manner.

公开(公告)号：US20190081766A1

公开(公告)日：2019-03-14

申请号：US15701007

申请日：2017-09-11

Applicant: Micron Technology, Inc.

Inventor： Fa-Long Luo ,  Tamara Schmitz ,  Jeremy Chritz ,  Jaime Cummins

IPC: H04L5/14 ,  H04B1/525 ,  H04B7/06 ,  H04W4/00

Abstract: Examples described herein include apparatuses and methods for full duplex device-to-device cooperative communication. Example systems described herein may include self-interference noise calculators. The output of a self-interference noise calculator may be used to compensate for the interference experienced due to signals transmitted by another antenna of the same wireless device or system. In implementing such a self-interference noise calculator, a selected wireless relaying device or wireless destination device may operate in a full-duplex mode, such that relayed messages may be transmitted as well as information from other sources or destinations during a common time period (e.g., symbol, slot, subframe, etc.).

公开(公告)号：US20180255552A1

公开(公告)日：2018-09-06

申请号：US15693122

申请日：2017-08-31

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Fa-Long Luo ,  Jaime Cummins ,  Tamara Schmitz ,  Jeremy Chritz

IPC: H04W72/04 ,  H04W72/08

Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of configuration modes for baseband units (BBU) and remote radio heads (RRH). For example, a computing system including a BBU and a RRH may receive a configuration mode selection including information indicative of a configuration mode for respective processing units of the BBU and the RRH. The computing system may allocate the respective processing units to perform wireless processing stages associated with a wireless protocol. The BBU and/or the RRH may generate an output data stream based on the mixing of coefficient data with input data at the BBU and/or the RRH. Examples of systems and methods described herein may facilitate the processing of data for 5G (e.g., New Radio (NR)) wireless communications in a power-efficient and time-efficient manner.

公开(公告)号：US10027523B2

公开(公告)日：2018-07-17

申请号：US15365326

申请日：2016-11-30

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Jeremy Chritz ,  Tamara Schmitz ,  Fa-Long Luo ,  Jaime Cummins

IPC: H04L27/04 ,  H04L27/12 ,  H04L27/20 ,  H04L27/26

Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of mixing input data with coefficient data. For example, a computing system with processing units may mix the input data for a transmission in a radio frequency (RF) wireless domain with the coefficient data to generate output data that is representative of the transmission being processed according to the wireless protocol in the RF wireless domain. A computing device may be trained to generate coefficient data based on the operations of a wireless transceiver such that mixing input data using the coefficient data generates an approximation of the output data, as if it were processed by the wireless transceiver. Examples of systems and methods described herein may facilitate the processing of data for 5G wireless communications in a power-efficient and time-efficient manner.

公开(公告)号：US12237918B2

公开(公告)日：2025-02-25

申请号：US18318162

申请日：2023-05-16

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Fa-Long Luo ,  Jaime Cummins ,  Jeremy Chritz ,  Tamara Schmitz

IPC: H04K1/10 ,  H04L1/00 ,  H04L27/00 ,  H04L27/26 ,  H04L27/28 ,  H04B1/04

Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of mixing input data with coefficient data specific to a processing mode selection. For example, a computing system with processing units may mix the input data for a transmission in a radio frequency (RF) wireless domain with the coefficient data to generate output data that is representative of the transmission being processed according to a specific processing mode selection. The processing mode selection may include a single processing mode, a multi-processing mode, or a full processing mode. The processing mode selection may be associated with an aspect of a wireless protocol. Examples of systems and methods described herein may facilitate the processing of data for 5G wireless communications in a power-efficient and time-efficient manner.

公开(公告)号：US12229044B2

公开(公告)日：2025-02-18

申请号：US17888748

申请日：2022-08-16

Applicant: Micron Technology, Inc.

Inventor： Fa-Long Luo ,  Jaime Cummins ,  Tamara Schmitz ,  Jeremy Chritz

IPC: G06F12/02 ,  G06F12/06 ,  G06F12/0864 ,  G06F12/0893

Abstract: Methods, apparatuses, and systems for tensor memory access are described. Multiple data located in different physical addresses of memory may be concurrently read or written by, for example, employing various processing patterns of tensor or matrix related computations. A memory controller, which may comprise a data address generator, may be configured to generate a sequence of memory addresses for a memory access operation based on a starting address and a dimension of a tensor or matrix. At least one dimension of a tensor or matrix may correspond to a row, a column, a diagonal, a determinant, or an Nth dimension of the tensor or matrix. The memory controller may also comprise a buffer configured to read and write the data generated from or according to a sequence of memory of addresses.