FLIP FLOP CIRCUIT
    71.
    发明申请
    FLIP FLOP CIRCUIT 有权
    FLIP FLOP电路

    公开(公告)号:US20160134265A1

    公开(公告)日:2016-05-12

    申请号:US14539407

    申请日:2014-11-12

    IPC分类号: H03K3/356 H03K3/037

    摘要: A flip-flop circuit includes a first latch, a second latch, and a trigger stage. The first latch is configured to set a first latch output signal based on a first latch input signal and a clock signal. The second latch is configured to set a second latch output signal based on a second latch input signal and the clock signal. The trigger stage is configured to generate the second latch input signal based on the first latch output signal. The trigger stage is configured to cause the second input signal to have different voltage swings based on the first latch output signal and the second latch output signal.

    摘要翻译: 触发器电路包括第一锁存器,第二锁存器和触发器级。 第一锁存器被配置为基于第一锁存器输入信号和时钟信号来设置第一锁存器输出信号。 第二锁存器被配置为基于第二锁存器输入信号和时钟信号来设置第二锁存器输出信号。 触发级被配置为基于第一锁存器输出信号产生第二锁存器输入信号。 触发级被配置为基于第一锁存器输出信号和第二锁存器输出信号使第二输入信号具有不同的电压摆幅。