公开(公告)号：US20090251175A1

公开(公告)日：2009-10-08

申请号：US12291731

申请日：2008-11-13

Applicant: Ki Ho Kim ,  Kang Seol Lee

Inventor： Ki Ho Kim ,  Kang Seol Lee

IPC: H03K3/00 ,  H03K5/12

CPC classification number: H03K19/00323 ,  H03K19/018564

Abstract: An input buffer includes a delay compensation unit for combining (a) a first signal obtained by buffering an input signal using another signal, which is out of phase with the input signal, with (b) a second signal obtained by buffering the input signal using a reference voltage signal, to output a third signal.

Abstract translation: 输入缓冲器包括延迟补偿单元，用于组合（a）通过使用与输入信号异相的另一信号来缓冲输入信号而获得的第一信号，（b）通过使用 参考电压信号，以输出第三信号。

公开(公告)号：US07576596B2

公开(公告)日：2009-08-18

申请号：US11714194

申请日：2007-03-06

Applicant: Kang-Seol Lee ,  Ji-Eun Jang

Inventor： Kang-Seol Lee ,  Ji-Eun Jang

IPC: G05F1/10

CPC classification number: G05F1/465

Abstract: Embodiments of the present invention are directed to provide an internal voltage generator of a semiconductor memory device for generating a predetermined stable level of an internal voltage. The semiconductor memory device includes a control signal generator, an internal voltage generator and an internal voltage compensator. The control signal generator generates a reference signal and a compensating signal which are corresponding to voltage level of the reference signal. The internal voltage generator generates an internal voltage in response to the reference signal. The internal voltage compensator compensates the internal voltage in response to the compensating signal.

Abstract translation: 本发明的实施例旨在提供一种用于产生内部电压的预定稳定电平的半导体存储器件的内部电压发生器。 半导体存储器件包括控制信号发生器，内部电压发生器和内部电压补偿器。 控制信号发生器产生对应于参考信号的电压电平的参考信号和补偿信号。 内部电压发生器响应于参考信号产生内部电压。 内部电压补偿器根据补偿信号补偿内部电压。

公开(公告)号：US07417909B2

公开(公告)日：2008-08-26

申请号：US11019570

申请日：2004-12-23

Applicant: Sang-Jin Byeon ,  Kang-Seol Lee

Inventor： Sang-Jin Byeon ,  Kang-Seol Lee

IPC: G11C7/00

CPC classification number: G11C7/12 ,  G11C7/06

Abstract: A semiconductor memory device employs a clamp for preventing latch up. For the purpose, the semiconductor memory device includes a precharging/equalizing unit for precharging and equalizing a pair of bit lines, and a control signal generating unit for producing a control signal which controls enable and disable of the precharging/equalizing unit, wherein the control signal generating unit includes a clamping unit to clamp its source voltage to a voltage level lower than that of its bulk bias.

Abstract translation: 半导体存储器件采用夹具来防止闩锁。 为此，半导体存储器件包括用于对一对位线进行预充电和均衡的预充电/均衡单元，以及用于产生控制预充电/均衡单元的使能和禁能的控制信号的控制信号产生单元，其中控制 信号发生单元包括钳位单元，用于将其源极电压钳位到低于其体积偏压的电压电平。

公开(公告)号：US20080159043A1

公开(公告)日：2008-07-03

申请号：US11819786

申请日：2007-06-29

Applicant: Kang-Seol Lee

Inventor： Kang-Seol Lee

IPC: G11C5/14

CPC classification number: G11C5/145 ,  G11C7/04 ,  G11C11/4074

Abstract: A negative voltage generator of a semiconductor memory device includes: a flag signal generation unit for receiving a temperature information code from an On Die Thermal Sensor (ODTS) to output a plurality of flag signals containing temperature information of the semiconductor memory device; and a negative voltage detection unit for detecting a negative voltage to output a detection signal for determining whether to pump a negative voltage, wherein a detection level of the negative voltage is changed according to the flag signals.

Abstract translation: 半导体存储器件的负电压发生器包括：标志信号生成单元，用于从On Die热敏传感器（ODTS）接收温度信息代码，以输出包含半导体存储器件的温度信息的多个标志信号; 以及负电压检测单元，用于检测负电压以输出用于确定是否泵送负电压的检测信号，其中根据标志信号改变负电压的检测电平。

公开(公告)号：US07382666B2

公开(公告)日：2008-06-03

申请号：US11641350

申请日：2006-12-19

Applicant: Kang-Seol Lee

Inventor： Kang-Seol Lee

IPC: G11C7/00 ,  G11C5/14

CPC classification number: G11C5/14

Abstract: A delay locked loop (DLL) power supply circuit for use in a semiconductor memory device, including: a DLL power supplier for supplying a DLL power supply voltage to a DLL in response to a reference voltage and a clock enable exit pulse signal; and a pulse signal generator for generating the clock enable exit pulse signal in response to a clock enable signal.

Abstract translation: 一种用于半导体存储器件的延迟锁定环路（DLL）电源电路，包括：DLL电源，用于响应于参考电压和时钟使能输出脉冲信号向DLL提供DLL电源电压; 以及脉冲信号发生器，用于响应于时钟使能信号产生时钟使能输出脉冲信号。

公开(公告)号：US07339847B2

公开(公告)日：2008-03-04

申请号：US11709745

申请日：2007-02-23

Applicant: Kyoung-Nam Kim ,  Kang-Seol Lee

Inventor： Kyoung-Nam Kim ,  Kang-Seol Lee

IPC: G11C7/12

CPC classification number: G11C11/4094

Abstract: A bit line equalization signal (BLEQ) driving circuit for generating an equalization signal used to perform a precharge operation in a semiconductor memory device includes a second boosted voltage generator for producing a second boosted voltage by pumping a supply voltage, a BLEQ driver for generating the equalization signal by using the second boosted voltage in response to an equalization command and providing the equalization signal to a precharge unit, an equalizer and an I/O switch module. By using the second boosted voltage VPUP, which is lower than a first boosted voltage and higher than the supply voltage, as the equalization signal to be provided to gates of transistors for precharging a low power device to a precharge voltage level, it is possible to save current that a voltage pump consumes and satisfy a constant tRP.

Abstract translation: 用于产生用于在半导体存储器件中执行预充电操作的均衡信号的位线均衡信号（BLEQ）驱动电路包括：第二升压电压发生器，用于通过泵送电源电压产生第二升压电压; BLEQ驱动器，用于产生 均衡信号，并且将均衡信号提供给预充电单元，均衡器和I / O开关模块。 通过使用低于第一升压电压并高于电源电压的第二升压电压VPUP作为要提供给用于将低功率器件预充电到预充电电压电平的晶体管的栅极的均衡信号， 节省电压泵消耗并满足一定tRP的电流。

公开(公告)号：US20080024203A1

公开(公告)日：2008-01-31

申请号：US11905530

申请日：2007-10-02

Applicant: Kang-Seol Lee ,  Jae-Hyuk Im

Inventor： Kang-Seol Lee ,  Jae-Hyuk Im

IPC: G05F1/10

CPC classification number: G11C5/14

Abstract: There is an internal voltage generating circuit for providing a stable internal voltage by supplying the internal voltage before a time point when it is used. The internal voltage generating circuit includes a charge pump unit for generating an internal voltage lower than an external voltage in response to pumping control signals and a supply driving control signal; a pumping control signal generating unit for outputting the pumping control signals to the charge pump unit based on a driving signal; and a supply driving control unit for receiving the driving signal to generate the supply driving control signal to the charge pump unit.

Abstract translation: 内部电压产生电路通过在使用时间点之前提供内部电压来提供稳定的内部电压。 内部电压产生电路包括电荷泵单元，用于响应于泵送控制信号和电源驱动控制信号产生低于外部电压的内部电压; 泵送控制信号产生单元，用于基于驱动信号将泵送控制信号输出到电荷泵单元; 以及电源驱动控制单元，用于接收驱动信号以向电荷泵单元产生电源驱动控制信号。

公开(公告)号：US20080001653A1

公开(公告)日：2008-01-03

申请号：US11714194

申请日：2007-03-06

Applicant: Kang-Seol Lee ,  Ji-Eun Jang

Inventor： Kang-Seol Lee ,  Ji-Eun Jang

IPC: G05F1/10

CPC classification number: G05F1/465

Abstract: Embodiments of the present invention are directed to provide an internal voltage generator of a semiconductor memory device for generating a predetermined stable level of an internal voltage. The semiconductor memory device includes a control signal generator, an internal voltage generator and an internal voltage compensator. The control signal generator generates a reference signal and a compensating signal which are corresponding to voltage level of the reference signal. The internal voltage generator generates an internal voltage in response to the reference signal. The internal voltage compensator compensates the internal voltage in response to the compensating signal.

Abstract translation: 本发明的实施例旨在提供一种用于产生内部电压的预定稳定电平的半导体存储器件的内部电压发生器。 半导体存储器件包括控制信号发生器，内部电压发生器和内部电压补偿器。 控制信号发生器产生对应于参考信号的电压电平的参考信号和补偿信号。 内部电压发生器响应于参考信号产生内部电压。 内部电压补偿器根据补偿信号补偿内部电压。

公开(公告)号：US07292090B2

公开(公告)日：2007-11-06

申请号：US11302375

申请日：2005-12-14

Applicant: Kang-Seol Lee ,  Jae-Hyuk Im

Inventor： Kang-Seol Lee ,  Jae-Hyuk Im

IPC: G05F1/10

CPC classification number: G11C5/14

Abstract: There is an internal voltage generating circuit for providing a stable internal voltage by supplying the internal voltage before a time point when it is used. The internal voltage generating circuit includes a charge pump unit for generating an internal voltage lower than an external voltage in response to pumping control signals and a supply driving control signal; a pumping control signal generating unit for outputting the pumping control signals to the charge pump unit based on a driving signal; and a supply driving control unit for receiving the driving signal to generate the supply driving control signal to the charge pump unit.

Abstract translation: 内部电压产生电路通过在使用时间点之前提供内部电压来提供稳定的内部电压。 内部电压产生电路包括电荷泵单元，用于响应于泵送控制信号和电源驱动控制信号产生低于外部电压的内部电压; 泵送控制信号产生单元，用于基于驱动信号将泵送控制信号输出到电荷泵单元; 以及电源驱动控制单元，用于接收驱动信号以向电荷泵单元产生电源驱动控制信号。

公开(公告)号：US07177206B2

公开(公告)日：2007-02-13

申请号：US10882454

申请日：2004-06-30

Applicant: Kang-Seol Lee

Inventor： Kang-Seol Lee

IPC: G11C7/00 ,  G11C5/14

CPC classification number: G11C5/14

Abstract: A delay locked loop (DLL) power supply circuit for use in a semiconductor memory device, including: a DLL power supplier for supplying a DLL power supply voltage to a DLL in response to a reference voltage and a clock enable exit pulse signal; and a pulse signal generator for generating the clock enable exit pulse signal in response to a clock enable signal.