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公开(公告)号：US10445071B2
公开(公告)日：2019-10-15
申请号：US15075493
申请日：2016-03-21
Inventor： Karsten Fischer
IPC: G06F8/35 , G05B19/042 , G06F8/30
Abstract: A computer-implemented method for computer-aided generation of an executable control program for controlling a control system with an electronic computing unit, wherein the functionality of the control program is at least partially described in a graphical model, and the graphical model includes at least one sub-model with at least one sub-functionality, wherein the graphical model is first translated into model code in a high-level programming language, and the model code is subsequently compiled into the control program that is executable on the control system. Manageability of sub-model functions of sub-models within a graphical model is improved by the means that the sub-model is translated into a sub-model code function in the high-level programming language, that the model is translated into comprehensive model code in the high-level programming language, and that the sub-model code function is called from the comprehensive model code by a pointer to the sub-model code function.
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公开(公告)号：US10444745B2
公开(公告)日：2019-10-15
申请号：US15415942
申请日：2017-01-26
Inventor： László Juhász , Jesse Lakemeier
Abstract: A method for automated configuration of a tester equipped for testing a control unit. A first and second model of technical systems being executed in the tester. The execution of the models taking place periodically with defined sampling rates. An FPGA executes the first and/or the second model and a CPU executes the first or the second model. A first individual sampling rate is allocated for the first model and a second individual sampling rate is allocated for the second model. The first model is assigned for execution on either the CPU or the FPGA and the second model is assigned for execution on either the CPU or the FPGA. The tester is automatically configured for execution of the first model with the first allocated sampling rate on the FPGA or the CPU and of the second model with the second allocated sampling rate on the FPGA or the CPU.
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公开(公告)号：US20190295335A1
公开(公告)日：2019-09-26
申请号：US16359294
申请日：2019-03-20
Inventor： Hendrik AMELUNXEN , Rainer FRANKE , Christian WÄCHTER
Abstract: A method for simulating different traffic situations for an autonomous or semiautonomous test vehicle. The method includes the simulated driving of the test vehicle through a simulated road network, and the simulated randomized driving of other vehicles through the simulated road network. The method also includes the capture of vehicle driving parameters. Further according to the method, there is a determination of whether a predefined traffic situation is satisfied by the test vehicle and at least one of the other vehicles, the at least one other vehicle being within a test zone around the test vehicle. Where the predefined traffic situation is satisfied, randomized driving of the at least one other vehicle can be stopped, and the at least one other vehicle can be made to perform a predetermined driving maneuver. The predetermined driving maneuver can provoke a reaction by the test vehicle.
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公开(公告)号：US20190294421A1
公开(公告)日：2019-09-26
申请号：US16181781
申请日：2018-11-06
Inventor： Torsten PIETZSCH , Wolfgang TRAUTMANN , Christian WITTE
Abstract: A computer-implemented method for editing one or more properties of one or more model elements in a block diagram of a technical computing environment. The model elements include blocks and variables in blocks, wherein one or more properties are assigned to each model element. The technical computing environment has a model editor, a data definition tool and a code generator. A processor of a host computer opens a block diagram in the model editor, displays a list of model elements present in the block diagram, receives a selection of one or more model elements, highlights the selected model elements, receives an edit command to set a new value for a chosen property of the selected model elements, and sets the chosen property to the new value. A non-transitory computer readable medium and a computer system is also provided.
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公开(公告)号：US10423571B2
公开(公告)日：2019-09-24
申请号：US15730155
申请日：2017-10-11
Inventor： Sebastian Fischer , Markus Suevern , Thomas Gewering , Barbara Kempkes
IPC: G06F15/78 , G06F11/22 , G05B19/02 , G06F11/26 , G05B19/042
Abstract: A method for configuring a real or virtual electronic control unit, wherein a control unit software is executed on the control unit, and the control unit software comprises a basic software layer, the basic software layer is configured by a module configuration file by setting values of parameters, the scope of the configurable parameters being defined in a first module definition file which contains the identifiers of the configurable parameters. The first module definition file is replaced by a second module definition file, and a conversion of the first module configuration file into a second module configuration file takes place.
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Patent Agency Ranking
86.发明授权公开(公告)号：US10386806B2
公开(公告)日：2019-08-20
申请号：US14842152
申请日：2015-09-01
Inventor： Marc Tegethoff
IPC: G05B17/02
Abstract: A method for connecting models of technical systems in a testing device equipped for control unit development having a connection of a first model of a first technical system to a second model of a second technical system. The first model and the second model include a model of a control unit, a model of a technical system to be controlled, or a model of an environment interacting with the control unit or with the technical system to be controlled. The first model has a first data interface and the second model has a second data interface. The method has the provision of a first model hierarchy structure and the provision of a second model hierarchy structure. The method has an automatic configuration of compatible connections so that the first model present in the testing device exchanges data with the second model present in the testing device through compatible connections.
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87.发明授权公开(公告)号：US10353832B2
公开(公告)日：2019-07-16
申请号：US15995711
申请日：2018-06-01
Inventor： Matthias Fromme , Jochen Sauer , Matthias Schmitz
Abstract: A number of software routines comprising at least two software routines are created for an interface unit of a computer system having a first and a second interface processor for forwarding input data from a peripheral to a processor of the computer system on which software is programmed. A first subset of the software routines is assigned to a first category provided for task-synchronous data transfer, and a second subset of the software routines are assigned to a second category provided for continuous data transfer. The first interface processor is programmed with the first subset and the second interface processor with the second subset of software routines. During execution of the software, the first subset is cyclically executed by the first interface processor at a first cycle rate, and the second subset is cyclically executed by the second interface processor at a second cycle rate.
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公开(公告)号：US10310822B1
公开(公告)日：2019-06-04
申请号：US15827196
申请日：2017-11-30
Inventor： Renata Hein , Wolfgang Trautmann , Sebastian Hillebrand
Abstract: A method for simulating a program modeled as one or more blocks of a block diagram in a technical computing environment. A block diagram is opened in a model editor. Source code is generated for the one or more blocks of the block diagram using the code generator. The program is configured from the source code using a predefined compiler in order to generate a binary executable file, and the program is simulated, which comprises running at least one function in the auxiliary file in order to determine at least the width of a basic data type corresponding to the enumeration variable in the binary executable file, and allocating one or more variables based on the determined byte width in order to log the simulation results.
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公开(公告)号：US20190163449A1
公开(公告)日：2019-05-30
申请号：US15827196
申请日：2017-11-30
Inventor： Renata HEIN , Wolfgang TRAUTMANN , Sebastian HILLEBRAND
Abstract: A method for simulating a program modeled as one or more blocks of a block diagram in a technical computing environment. A block diagram is opened in a model editor. Source code is generated for the one or more blocks of the block diagram using the code generator. The program is configured from the source code using a predefined compiler in order to generate a binary executable file, and the program is simulated, which comprises running at least one function in the auxiliary file in order to determine at least the width of a basic data type corresponding to the enumeration variable in the binary executable file, and allocating one or more variables based on the determined byte width in order to log the simulation results.
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公开(公告)号：US10275542B2
公开(公告)日：2019-04-30
申请号：US13957463
申请日：2013-08-02
Inventor： Martin Ruehl , Andreas Pillekeit , Frank Mertens
Abstract: A configuration tool includes a tangible, non-transitory computer-readable medium having computer-executable instructions for configuring a model of a technical system and displaying the model on a display connected to a computer. The model includes at least two model components. Each model component has at least one port. Each model component is displayable in an expanded component representation on the display. The at least one port of each model component is connectable to at least one port of another model component by port association lines. Each model component is displayable in an expanded line representation on the display along with the at least one port and the port association lines of each model component. At least for one selected model component the port association lines connected to ports of the selected model component can be selected to be displayed in a reduced line representation.
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