Abstract:
A light guide plate comprises a transparent light guide plate body; and a plurality of reflection sheets disposed inside the light guide plate body adjacent to a bottom surface of the light guide plate body, wherein a surface of the reflection sheet away from the bottom surface is configured as a reflection surface, regions of the light guide plate body except the reflection sheets are configured as light transmission regions, and the light transmission regions and the reflection sheets are alternately arranged. Since the reflection sheets are provided inside the light guide plate body, the reflection sheet reflects the light which is directed from the one surface and passes through the display panel, and prevents the light, which is directed from the other surface of the display apparatus, from passing through the display panel and interfering with the normal display of the one surface. In this way, the display apparatus can achieve the double-surface display.
Abstract:
The present invention provides an open-type head mount display device and a display method thereof. The open-type head mount display device according to the present invention comprises a display unit for generating display images; a focusing lens unit for adjusting the object distance of a display image from a user's eye; an image acquisition unit for acquiring the image of the two eyes of the user; a focal distance analyzing unit for obtaining the focal distance of the user's eye according to the image of the two eyes of the user; and a lens adjusting unit for adjusting the position of the focusing lens unit in the light ray propagation direction of the display image according to a control command from the analyzing unit, so that the object distance of the display image is matched with the current focal distance of the user's eye.
Abstract:
A display panel and a display device are provided. In the display panel, a plurality of main spacers and a plurality of auxiliary spacers are disposed on a side of a first substrate close to a second substrate, the second substrate further includes a plurality of first lug bosses and a plurality of second lug bosses; an orthographic projection of the main spacers on the second substrate is at least partially overlapped with an orthographic projection of a corresponding first lug boss on the second substrate; an orthographic projection of the auxiliary spacers on the second substrate is away from an orthographic projection of a corresponding second lug boss on the second substrate by a preset distance; and the distance between each of the auxiliary spacers and the corresponding second lug boss is less than a height of the first lug bosses.
Abstract:
A display panel is provided. The display panel includes a first substrate faces a second substrate. The first substrate includes a plurality of first spacers and a plurality of second spacers. The second substrate includes a corresponding plurality of first protrusions and a plurality of second protrusions. A sum of a height of the first protrusion and a height of the first spacer is greater than that of the second spacer. Each of the first spacers includes at least one protrusion. A length of an orthographic projection of each protrusion on a plane of the first substrate is longer in one direction.
Abstract:
An array substrate and a manufacture method thereof, a display panel and a display device. The array substrate includes pixel units. Each pixel unit includes a pixel electrode and a common electrode, which are respectively includes first pixel electrode strips and first common electrode strips that are arranged substantially in parallel in parallel in a first direction, each first common electrode strip overlaps at least one first pixel electrode strip. Each pixel unit includes at least one pixel unit sub-area, which has a sub-area symmetry axis, the first pixel electrode strip and the first common electrode strip are respectively arranged with respect to the sub-area symmetry axis symmetrically. On either side of the sub-area symmetry axis, the first common electrode strip is farther away from or closer to the sub-area symmetry axis than the at least one first pixel electrode strip that the each first common electrode strip overlaps.
Abstract:
A pixel structure, a display panel and a display device are provided. The pixel structure includes: a base substrate; a plurality of gate lines; a plurality of data lines; a plurality of pixel units, each includes a pixel electrode and a common electrode; and a common electrode line connected with the common electrode, wherein, the common electrode line includes a first part extended along the row direction and a second part extended along the column direction; the first part is electrically connected with the second part; both the first part and the second part are arranged in a same layer with the plurality of data lines; and a projection of the first part on the base substrate is at least partially disposed between projections of a gate line among the plurality of gate lines which is closest to the first part and the pixel electrode on the base substrate.
Abstract:
The disclosure discloses a display drive circuit, a display device, and a method for driving the same, where the display drive circuit includes a control circuit arranged between a power supply management circuit and a level conversion circuit, and the control circuit is configured to boost a standard gate turn-on voltage signal provided by the power supply management circuit, and to generate and then output a higher gate turn-on voltage signal to the level conversion circuit, upon determining that an ambient temperature is below a set temperature, and/or an output of a gate drive circuit of a display panel is abnormal, so that the level conversion circuit generates and then outputs a corresponding gate drive signal at higher voltage.
Abstract:
An array substrate, a method for fabricating the same and a display device are disclosed. The array substrate includes: a gate electrode of a TFT and a gate insulation layer sequentially formed on a base substrate; a semiconductor active layer, an etch stop layer and a source electrode and a drain electrode of the TFT sequentially formed on a part of the gate insulation layer that corresponds to the gate electrode of the TFT, the source and drain electrodes of the TFT are respectively in contact with the semiconductor active layer by way of via holes. The array substrate further includes: a first insulation layer formed between the gate electrode of the TFT and the gate insulation layer and the gate electrode is in contact with the gate insulation layer at a channel region of the TFT between the source electrode and the drain electrode of the TFT.
Abstract:
The embodiment of the present disclosure discloses an array substrate. The array substrate comprises: a base, a plurality of first scanning lines, a plurality of second scanning lines, a plurality of data lines, a common electrode line, and a plurality of pixel units. Each of the pixel units comprises: a first electrode, a second electrode, a switch transistor, a shared transistor and a shared capacitor. The switch transistor has a first terminal coupled to the second electrode, a second terminal coupled to one of the plurality of data lines, a bottom gate coupled to one of the plurality of first scanning lines, and a top gate coupled to one of the plurality of second scanning lines, and is configured to transfer a data signal of the data line to the second electrode under the control of a first scanning signal and a second scanning signal.
Abstract:
The disclosure discloses an array substrate, a method for driving the same and a display device. The array substrate includes: a plurality of pixel elements, all pixel elements in each column being connected on two data lines and two gate lines, each pixel element in each column is electrically connected with a first data line through a first switch transistor and electrically connected with a second data line through a second switch transistor; all gates of first switch transistors connected with respective pixel elements in each row are connected on a first gate line, all gates of second switch transistors connected with the respective pixel elements in each row are connected on a second gate line; and a first data line and a second data line shared by each column are located respectively on two sides of said column and have drive voltage with opposite polarities and equal amplitudes.