Device for controlling induction motor and method of controlling the same
    82.
    发明授权
    Device for controlling induction motor and method of controlling the same 有权
    用于控制感应电动机的装置及其控制方法

    公开(公告)号:US6147470A

    公开(公告)日:2000-11-14

    申请号:US254707

    申请日:1999-03-12

    IPC分类号: H02P21/00 H02P3/00 H02P5/40

    CPC分类号: H02P21/36

    摘要: A vector control apparatus having a DC braking function which is insusceptible to trip even upon DC braking and scarcely suffers vibration upon stoppage is provided.The control apparatus includes a DC braking control arithmetic unit 1 and switches S1, S3 and S4 controlled thereby, wherein in a vector control mode, the DC braking control arithmetic unit 1 sets all the switches S1, S3 and S4 to position a for realizing the vector control. When a DC control state is to be validated from the above-mentioned state, phase of voltage vector is calculated to change over the switches S1 and S3 to position b, and the absolute value of the q-axis current is compared with a reference value .alpha.. When the absolute value of the q-axis current is smaller than the reference value .alpha., the switch S4 is changed over to the position b to thereby effectuate only the d-axis current control.According to the present invention, there is provided a vector control apparatus having a tripless DC braking function. Since vibration occurring upon stoppage can be suppressed, stopping position accuracy upon DC braking in emergency can be enhanced. Further, low-noise systems are made available.

    摘要翻译: PCT No.PCT / JP96 / 02625 Sec。 371 1999年3月12日 102(e)1999年3月12日PCT PCT 1996年9月13日PCT公布。 公开号WO98 / 11663 日期1998年3月19日提供具有直流制动功能的矢量控制装置,即使在直流制动时也不易跳闸,并且在停止时几乎不受振动。 控制装置包括直流制动控制运算单元1和由此控制的开关S1,S3和S4,其中在矢量控制模式中,直流制动控制运算单元1将所有开关S1,S3和S4设置为用于实现 矢量控制。 当从上述状态来确认直流控制状态时,计算电压矢量的相位,将开关S1,S3切换为位置b,将q轴电流的绝对值与基准值进行比较 α 。 当q轴电流的绝对值小于参考值α时,开关S4切换到位置b,从而仅实现d轴电流控制。 根据本发明,提供一种具有三重直流制动功能的矢量控制装置。 由于能够抑制停止时发生的振动,所以可以提高紧急时的直流制动时的停止位置精度。 此外,还提供低噪声系统。

    Apparatus and method for generating linearly filtered composite signal
    83.
    发明授权
    Apparatus and method for generating linearly filtered composite signal 失效
    用于产生线性滤波复合信号的装置和方法

    公开(公告)号:US5555515A

    公开(公告)日:1996-09-10

    申请号:US278909

    申请日:1994-07-22

    IPC分类号: G06F12/02 H04S1/00 G06F7/10

    CPC分类号: H04S1/007

    摘要: An apparatus and method for generating a linearly filtered composite signal, wherein the original signal of said composite signal can be divided into a plurality of sequentially arranged original sub-signals. The apparatus having a plurality of memory (1.sub.1, 1.sub.2) which have stored filtered sub-signals y.sub.1 (n), y.sub.2 (n) obtained by linearly filtering the original sub-signals, respectively; an adder (5) for adding data of the sub-signals y.sub.1 (n), y.sub.2 (n) read out from the memory to provide the resultant data y.sub.1 (n)+y.sub.2 (n) to an output terminal of the apparatus; and a controller for controlling timings of providing the data of the sub-signals stored in the memory to the adder. The controller controls such that when a first sub-signal is to be generated, the data thereof sequentially read out from the corresponding memory are provided to the adder, thereby providing the data thereof through the adder to the output terminal, when a second sub-signal is to be generated in place of the first one, during a predetermined time period centered at a switching timing from the first sub-signal to the second one, both of data of the first and second sub-signals read out from the corresponding memory are added at the adder, thereby providing the added data to the output terminal, and thereafter, only the data of the second sub-signal read out from the second memory are provided to the adder, thereby providing the data thereof to the output terminal.

    摘要翻译: 一种用于产生线性滤波的复合信号的装置和方法,其中所述复合信号的原始信号可以被划分成多个顺序排列的原始子信号。 具有多个存储器(11,12)的装置具有分别通过对原始子信号进行线性滤波而获得的滤波后的子信号y1(n),y2(n) 加法器(5),用于将从存储器读出的子信号y1(n),y2(n)的数据相加,以将结果数据y1(n)+ y2(n)提供给设备的输出端; 以及控制器,用于控制将存储在存储器中的子信号的数据提供给加法器的定时。 控制器控制使得当要生成第一子信号时,从对应的存储器顺序读出的数据被提供给加法器,从而通过加法器将其数据提供给输出端, 在以从第一子信号到第二子信号的切换定时为中心的预定时间段期间,将产生信号代替第一信号,从对应的存储器读出的第一和第二子信号的两个数据 在加法器中相加,从而将相加的数据提供给输出端,之后仅将从第二存储器读出的第二子信号的数据提供给加法器,从而将其数据提供给输出端。