COUNTERMEASURES FOR SIDE-CHANNEL ATTACKS ON PROTECTED SIGN AND KEY EXCHANGE OPERATIONS

    公开(公告)号:US20210409188A1

    公开(公告)日:2021-12-30

    申请号:US16911261

    申请日:2020-06-24

    Abstract: Embodiments are directed to countermeasures for side-channel attacks on protected sign and key exchange operations. An embodiment of storage mediums includes instructions for commencing a process including an elliptic curve scalar multiplication (ESM) operation including application of a secret scalar value; splitting the secret scalar value into two random scalar values; counting a number of leading ‘0’ bits in the scalar value and skipping the number of leading ‘0’ bits in processing; performing an ESM iteration for each bit of the secret scalar value beginning with a most significant ‘1’ bit of the scalar value including a Point Addition operation and a Point Double operation for each bit on randomized points; performing ESM operation dummy iterations equal to the number of leading ‘0’ bits; and returning an output result for the ESM operation.

    HIGH THROUGHPUT POST QUANTUM AES-GCM ENGINE FOR TLS PACKET ENCRYPTION AND DECRYPTION

    公开(公告)号:US20210399876A1

    公开(公告)日:2021-12-23

    申请号:US16909648

    申请日:2020-06-23

    Abstract: In one example an apparatus comprises an input register to receive at least a portion of a transport layer data packet, an encryption/decryption pipeline communicatively coupled to the input register, comprising a first section comprising a set of advanced encryption standard (AES) engines including at least a first AES engine to perform encryption and/or decryption operations on input data from the at least a portion of a transport layer data packet, a second AES engine to determine an authentication key, and a third AES engine to determine an authentication tag mask, a second section comprising a first set of Galois field multipliers comprising at least a first Galois field multiplier to compute a first multiple of the authentication key, a third section comprising a second set of Galois field multipliers to compute a first partial authentication tag, and a fourth section comprising a processing circuitry to compute a second partial authentication tag and a final authentication tag.

    POST-QUANTUM SECURE REMOTE ATTESTATION FOR AUTONOMOUS SYSTEMS

    公开(公告)号:US20210119799A1

    公开(公告)日:2021-04-22

    申请号:US17133558

    申请日:2020-12-23

    Abstract: A method comprises maintaining, for at least one remote device, a security footprint and a verified version of a software stack for the remote device, generating an attestation initiation token that includes a nonce to be used to generate an XMSS signature for attestation of the remote device, sending the attestation initiation token to the remote device, receiving, from the remote device, a modified message representative including a hash of a current version of a software stack for the remote device and an indicator of a version number of the current version of the software stack for the remote device, validating the hash, and in response to a determination that the hash is valid, generating an XMSS signature using the security footprint and the current version of a software stack for the remote device and a security footprint for the apparatus.

    METHODS AND APPARATUS FOR ANOMALY DETECTION AND RECOVERY

    公开(公告)号:US20190158521A1

    公开(公告)日:2019-05-23

    申请号:US16235812

    申请日:2018-12-28

    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for anomaly detection and recovery. An apparatus to isolate a first controller in an autonomous vehicle includes a first controller to control a reference signal of the autonomous vehicle via a communication bus, a second controller to control the reference signal of the autonomous vehicle when the first controller is compromised, and a message neutralizer to neutralize messages transmitted by the first controller when the first controller is compromised, the neutralized messages to cause the first controller to become isolated from the communication bus.

    ACCELERATING EIGHT-WAY PARALLEL KECCAK EXECUTION

    公开(公告)号:US20250138829A1

    公开(公告)日:2025-05-01

    申请号:US19009066

    申请日:2025-01-03

    Abstract: A method comprises fetching, by fetch circuitry, an encoded XOR3P instruction comprising at least one opcode, a first source identifier to identify a first register, a second source identifier to identify a second register, a third source identifier to identifier a third register, and a fourth source identifier to identify a fourth operand, wherein the first register is to store a first value, the second register is to store a second value, and the third register is to store a third value, decoding, by decode circuitry, the encoded XOR3PP instruction to generate a decoded XOR3PP instruction; and executing, by execution circuitry, the decoded XOR3PP instruction to determine a first rotational value and a second rotational value, perform a rotate operation on at least a portion of the first value based on the first rotational value to generate a rotated third value, perform an XOR operation on at least a portion of the first value, at least a portion of the second value, and the rotated third value to generate an XOR result, perform a rotate operation on the XOR result based on the second rotational value to generate a rotated XOR; and store the rotated XOR result.

    Accelerating eight-way parallel Keccak execution

    公开(公告)号:US12197921B2

    公开(公告)日:2025-01-14

    申请号:US18145801

    申请日:2022-12-22

    Abstract: A method comprises fetching, by fetch circuitry, an encoded XOR3PP instruction comprising at least one opcode, a first source identifier to identify a first register, a second source identifier to identify a second register, a third source identifier to identifier a third register, and a fourth source identifier to identify a fourth operand, wherein the first register is to store a first value, the second register is to store a second value, and the third register is to store a third value, decoding, by decode circuitry, the encoded XOR3PP instruction to generate a decoded XOR3PP instruction; and executing, by execution circuitry, the decoded XOR3PP instruction to determine a first rotational value and a second rotational value, perform a rotate operation on at least a portion of the first value based on the first rotational value to generate a rotated third value, perform an XOR operation on at least a portion of the first value, at least a portion of the second value, and the rotated third value to generate an XOR result, perform a rotate operation on the XOR result based on the second rotational value to generate a rotated XOR; and store the rotated XOR result.

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