公开(公告)号：US06290736B1

公开(公告)日：2001-09-18

申请号：US09247655

申请日：1999-02-09

申请人： David R. Evans

发明人： David R. Evans

IPC分类号： C09G102

CPC分类号： C09G1/02 ,  C23F3/00

摘要： A slurry and CMP process to polish a noble metal surface is provided. The slurry and polishing process are used to form a damascene, or dual damascene noble metal inlay. Such as inlay is useful is forming an integrated circuit ferroelectric capacitor electrode. The slurry includes a halogen, such as bromine, in a basic aqueous solution to chemically react with the noble metal. With an abrasive added, the slurry is used to polish and remove noble metals from a wafer surface during a CMP process.

摘要翻译： 提供了抛光贵金属表面的浆料和CMP工艺。 浆料和抛光工艺用于形成镶嵌，或双镶嵌贵金属镶嵌。 如嵌体是有用的是形成集成电路的铁电电容器电极。 该浆料在碱性水溶液中包含卤素如溴，以与贵金属发生化学反应。 加入磨料后，在CMP工艺中，浆料用于在晶片表面上抛光和去除贵金属。

公开(公告)号：US4732865A

公开(公告)日：1988-03-22

申请号：US915303

申请日：1986-10-03

申请人： David R. Evans ,  James S. Flores ,  Susan S. Dottarar

发明人： David R. Evans ,  James S. Flores ,  Susan S. Dottarar

IPC分类号： H01L21/283 ,  H01L21/31 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/29 ,  H01L23/31 ,  H01L23/52 ,  H01L23/532 ,  H01L21/385 ,  H01L21/441 ,  H01L21/467

CPC分类号： H01L23/291 ,  H01L21/32051 ,  H01L21/76885 ,  H01L21/76886 ,  H01L23/3171 ,  H01L23/53242 ,  H01L23/53252 ,  H01L2924/0002

摘要： A multi-layer metallization method and structure that permits the use of sodium-ion contaminated titanium-tungsten (Ti:W) as a barrier metal with gold conductor metal on a silicon substrate, without significant degradation of device characteristics. After depositing the barrier and conductor metal layers, a layer of phosphorous-silicate glass (PSG) is anisotropically-etched to expose the field oxide and top surface of the conductor metal but leave PSG layer on each sidewall of the metallization structure. The circuit is then annealed at 400.degree. C. for 30 minutes. Then, an adhesion layer (Si.sub.3 N.sub.4) and an insulative layer (SiO.sub.2) are deposited over the metallization structure and field oxide, with the adhesion layer in contact with the top surface of the conductor metal and the gettering composition. The resultant circuit has a field threshold voltage shift comparable to devices made without a metal-ion-contaminated barrier layer and the resultant structure reliably retains the PSG layers in contact with the metallization sidewalls.

摘要翻译： 允许在硅衬底上使用钠离子污染的钛 - 钨（Ti：W）作为金导体金属的阻挡金属的多层金属化方法和结构，而不会显着降低器件特性。 在沉积阻挡层和导体金属层之后，各向异性蚀刻一层磷硅酸盐玻璃（PSG），以露出导体金属的场氧化物和顶表面，但在金属化结构的每个侧壁上留下PSG层。 然后将电路在400℃退火30分钟。 然后，在金属化结构和场氧化物上沉积粘合层（Si 3 N 4）和绝缘层（SiO 2），其中粘合层与导体金属的顶表面和吸气组合物接触。 所得到的电路具有与没有金属离子污染的阻挡层制成的器件相当的场阈值电压偏移，并且所得结构可靠地保持PSG层与金属化侧壁接触。