公开(公告)号：US20140063663A1

公开(公告)日：2014-03-06

申请号：US13598194

申请日：2012-08-29

申请人： Federico Agustin ALTOLAGUIRRE ,  Ming-Dou Ker ,  Ryan Hsin-Chin Jiang

发明人： Federico Agustin ALTOLAGUIRRE ,  Ming-Dou Ker ,  Ryan Hsin-Chin Jiang

IPC分类号： H02H9/04

CPC分类号： H02H9/046 ,  H01L2924/0002 ,  H01L2924/00

摘要： A power-rail ESD clamp circuit with a silicon controlled rectifier and a control module is provided. The silicon controlled rectifier is connected to a high voltage level and a low voltage level for bearing a current flow. The control module is connected to the silicon controlled rectifier in parallel, and includes a PMOS, a NMOS, at least one output diode, a resistor and a conducting string. The silicon controlled rectifier is a P+ or N+ triggered silicon controlled rectifier. By employing the novel power-rail ESD clamp circuit, it is extraordinarily advantageous of reducing both a standby leakage current and layout area while implementation.

摘要翻译： 提供了具有可控硅整流器和控制模块的电力轨道ESD钳位电路。 可控硅整流器连接到高电压电平和低电压电平以承受电流。 控制模块并联连接到可控硅整流器，并且包括PMOS，NMOS，至少一个输出二极管，电阻器和导电串。 可控硅整流器是P +或N +触发的可控硅整流器。 通过采用新型的电源轨ESD钳位电路，在实现时减少备用漏电流和布局面积是非常有利的。

公开(公告)号：US08049247B2

公开(公告)日：2011-11-01

申请号：US12113410

申请日：2008-05-01

申请人： Tang-Kuei Tseng ,  Che-Hao Chuang ,  Ryan Hsin-Chin Jiang ,  Ming-Dou Ker

发明人： Tang-Kuei Tseng ,  Che-Hao Chuang ,  Ryan Hsin-Chin Jiang ,  Ming-Dou Ker

IPC分类号： H01L29/747

CPC分类号： H01L29/747 ,  H01L27/0262 ,  H01L29/87

摘要： The present invention discloses an asymmetric bidirectional silicon-controlled rectifier, which comprises: a second conduction type substrate; a first conduction type undoped epitaxial layer formed on the substrate; a first well and a second well both formed inside the undoped epitaxial layer and separated by a portion of the undoped epitaxial layer; a first buried layer formed in a junction between the first well and the substrate; a second buried layer formed in a junction between the second well and the substrate; a first and a second semiconductor area with opposite conduction type both formed inside the first well; a third and a fourth semiconductor area with opposite conduction type both formed inside the second well, wherein the first and second semiconductor areas are connected to the anode of the silicon-controlled rectifier, and the third and fourth semiconductor areas are connected to the cathode of the silicon-controlled rectifier.

摘要翻译： 本发明公开了一种不对称双向硅控整流器，其包括：第二导电型衬底; 形成在基板上的第一导电型未掺杂外延层; 第一阱和第二阱都形成在未掺杂的外延层内部并由未掺杂的外延层的一部分分离; 第一掩埋层，形成在所述第一阱和所述衬底之间的接合处; 第二掩埋层，形成在所述第二阱和所述衬底之间的接合处; 在第一阱内形成具有相反导电类型的第一和第二半导体区域; 具有相反导电类型的第三和第四半导体区域都形成在第二阱内部，其中第一和第二半导体区域连接到可控硅整流器的阳极，并且第三和第四半导体区域连接到 硅控整流器。

公开(公告)号：US07705404B2

公开(公告)日：2010-04-27

申请号：US11613193

申请日：2006-12-20

申请人： Ming-Dou Ker ,  Jia-Huei Chen ,  Ryan Hsin-Chin Jiang

发明人： Ming-Dou Ker ,  Jia-Huei Chen ,  Ryan Hsin-Chin Jiang

IPC分类号： H01L23/62

CPC分类号： H01L27/027 ,  H01L2924/0002 ,  H01L2924/00

摘要： An electrostatic discharge (ESD) protection device and a layout thereof are provided. A bias conducting wire is mainly used to couple each base of a plurality of parasitic transistors inside ESD elements together, in order to simultaneously trigger all the parasitic transistors to bypass the ESD current, avoid the elements of a core circuit being damaged, and solve the non-uniform problem of bypassing the ESD current when ESD occurs. Furthermore, in the ESD protection layout, it only needs to add another doped region on a substrate neighboring to, but not contacting, doped regions of the ESD protection elements and use contacts to connect the added doped region, so as to couple each base of the parasitic transistors together without requiring for additional layout area.

摘要翻译： 提供静电放电（ESD）保护装置及其布局。 偏置导线主要用于将ESD元件内的多个寄生晶体管的每个基极耦合在一起，以便同时触发所有寄生晶体管绕过ESD电流，避免核心电路的元件被损坏，并解决 当ESD发生时绕过ESD电流的非均匀问题。 此外，在ESD保护布局中，仅需要在与ESD保护元件的掺杂区域相邻但不接触的衬底上添加另一个掺杂区域，并使用触点来连接所添加的掺杂区域，以便将 寄生晶体管一起而不需要额外的布局区域。

公开(公告)号：US07663853B2

公开(公告)日：2010-02-16

申请号：US11618674

申请日：2006-12-29

申请人： Ming-Dou Ker ,  Jang-Jie Peng ,  Hsin-Chin Jiang

发明人： Ming-Dou Ker ,  Jang-Jie Peng ,  Hsin-Chin Jiang

IPC分类号： H02H7/00

CPC分类号： H01L27/0248 ,  H03K17/0822

摘要： An on-chip latch-up protection circuit. The lath-up protection circuit includes a core circuit, a power switch, and a current extractor. The power switch controls major current flowing through the core circuit. The current extractor detects amplitude of the major current. The power switch, the core circuit and the current extractor are coupled in series between a relatively-high power line and a relatively-low power line. When the major current surpasses a predetermined amplitude, the power switch is turned off, causing latch-up stops.

摘要翻译： 一个片内闭锁保护电路。 上拉保护电路包括核心电路，电源开关和电流提取器。 电源开关控制流经核心电路的大电流。 当前提取器检测主电流的幅度。 电源开关，核心电路和电流提取器串联在相对较高的电力线和相对低的电力线之间。 当主电流超过预定幅度时，电源开关被关闭，导致闭锁停止。

公开(公告)号：US06838908B2

公开(公告)日：2005-01-04

申请号：US10400873

申请日：2003-03-28

申请人： Ming-Dou Ker ,  Che-Hao Chuang ,  Kuo-Chung Lee ,  Hsin-Chin Jiang

发明人： Ming-Dou Ker ,  Che-Hao Chuang ,  Kuo-Chung Lee ,  Hsin-Chin Jiang

IPC分类号： H03K19/003 ,  H03K19/0175 ,  H03K19/094

CPC分类号： H03K19/00361

摘要： A mixed-voltage I/O buffer circuit that prevents leakages through a driver stage PMOS transistor is provided. The buffer circuit has a first part that prevents leakage through a parasitic diode of the transistor and a second part that prevents leakage through the transistor when the transistor is turned on by a signal on a bonding pad having a voltage level higher than a power supply voltage of the buffer circuit. The buffer circuit provides biases approximately equal to the high voltage signal to a gate and a substrate terminal of the PMOS transistor when the bonding pad has the high voltage signal thereon, and provides a bias approximately equal to the power supply voltage of the buffer circuit to the gate and substrate of the PMOS transistor when the bonding pad has a low voltage signal thereon.

摘要翻译： 提供了一种混合电压I / O缓冲电路，其防止通过驱动级PMOS晶体管的泄漏。 缓冲电路具有第一部分，其防止通过晶体管的寄生二极管的泄漏;以及第二部分，当第二部分通过具有高于电源电压的电压电平的焊盘上的信号导通晶体管时，防止漏电流通过晶体管 的缓冲电路。 当焊盘在其上具有高电压信号时，缓冲电路向PMOS晶体管的栅极和衬底端子提供大致等于高电压信号的偏压，并且提供大致等于缓冲电路的电源电压的偏置， 当焊盘在其上具有低电压信号时，PMOS晶体管的栅极和衬底。

公开(公告)号：US08892202B2

公开(公告)日：2014-11-18

申请号：US13439365

申请日：2012-04-04

申请人： Chun-Yu Lin ,  Yi-Ju Li ,  Ming-Dou Ker

发明人： Chun-Yu Lin ,  Yi-Ju Li ,  Ming-Dou Ker

IPC分类号： A61N1/08 ,  A61N1/18

CPC分类号： A61N1/025 ,  A61N1/36125 ,  H01L2924/0002 ,  H01L2924/00

摘要： The disclosure relates to a current stimulator, which comprises a high voltage output module, a voltage control module and a charge pump module. The high voltage output module includes a plurality of stacked transistors, and receives an input control signal able to turn on/off the current stimulator and a first voltage. A second voltage is generated by adding the voltages output by all the transistors to the first voltage and then output to the voltage control module. The voltage control module outputs a voltage control signal able to stabilize the stimulus current for the load according to the second voltage and the load impedance variation. The charge pump regulates the first voltage according to the voltage control signal, and outputs the regulated first voltage to the high voltage output module. Thereby, the current stimulator can adaptively stabilize the stimulus current, responding to load impedance variation.

摘要翻译： 本公开涉及一种电流刺激器，其包括高压输出模块，电压控制模块和电荷泵模块。 高电压输出模块包括多个堆叠的晶体管，并且接收能够接通/关断电流刺激器的输入控制信号和第一电压。 通过将由所有晶体管输出的电压加到第一电压然后输出到电压控制模块来产生第二电压。 电压控制模块根据第二电压和负载阻抗变化输出能够稳定负载的刺激电流的电压控制信号。 电荷泵根据电压控制信号调节第一电压，并将调节的第一电压输出到高电压输出模块。 因此，电流刺激器可以自适应地稳定刺激电流，响应于负载阻抗变化。

公开(公告)号：US08527061B2

公开(公告)日：2013-09-03

申请号：US13224166

申请日：2011-09-01

申请人： Ming-Dou Ker ,  Wei-Ling Chen ,  Chun-Yu Lin

发明人： Ming-Dou Ker ,  Wei-Ling Chen ,  Chun-Yu Lin

IPC分类号： A61N1/08

CPC分类号： A61N1/36521

摘要： The disclosure relates to a load-adaptive bioelectrical current stimulator, which comprises a current output module, an adaptation module and a control module. The current output module generates a stimulus current to an electrode. The adaptation module detects the electrical status of the stimulus current passing through the electrode and generates a feedback signal to the control module. According to the feedback signal, the control module controls the current output module to stabilize the output status of the stimulus current adaptively. Thereby, the load-adaptive bioelectrical current stimulator can use the feedback control mechanism to regulate the value of the stimulus current to adapt to variation of load impedance.

摘要翻译： 本公开涉及一种负载自适应生物电流电流刺激器，其包括电流输出模块，适配模块和控制模块。 电流输出模块产生到电极的刺激电流。 适配模块检测通过电极的刺激电流的电气状态，并产生一个到控制模块的反馈信号。 根据反馈信号，控制模块控制电流输出模块，自适应地稳定激励电流的输出状态。 因此，负载自适应生物电流电流刺激器可以使用反馈控制机制来调节刺激电流的值以适应负载阻抗的变化。

公开(公告)号：US20130172958A1

公开(公告)日：2013-07-04

申请号：US13439365

申请日：2012-04-04

申请人： Chun-Yu Lin ,  Yi-ju Li ,  Ming-Dou Ker

发明人： Chun-Yu Lin ,  Yi-ju Li ,  Ming-Dou Ker

IPC分类号： A61N1/36

CPC分类号： A61N1/025 ,  A61N1/36125 ,  H01L2924/0002 ,  H01L2924/00

摘要： The disclosure relates to a current stimulator, which comprises a high voltage output module, a voltage control module and a charge pump module. The high voltage output module includes a plurality of stacked transistors, and receives an input control signal able to turn on/off the current stimulator and a first voltage. A second voltage is generated by adding the voltages output by all the transistors to the first voltage and then output to the voltage control module. The voltage control module outputs a voltage control signal able to stabilize the stimulus current for the load according to the second voltage and the load impedance variation. The charge pump regulates the first voltage according to the voltage control signal, and outputs the regulated first voltage to the high voltage output module. Thereby, the current stimulator can adaptively stabilize the stimulus current, responding to load impedance variation.

摘要翻译： 本公开涉及一种电流刺激器，其包括高压输出模块，电压控制模块和电荷泵模块。 高电压输出模块包括多个堆叠的晶体管，并且接收能够接通/关断电流刺激器的输入控制信号和第一电压。 通过将由所有晶体管输出的电压加到第一电压然后输出到电压控制模块来产生第二电压。 电压控制模块根据第二电压和负载阻抗变化输出能够稳定负载的刺激电流的电压控制信号。 电荷泵根据电压控制信号调节第一电压，并将调节的第一电压输出到高电压输出模块。 因此，电流刺激器可以自适应地稳定刺激电流，响应于负载阻抗变化。

公开(公告)号：US20120146151A1

公开(公告)日：2012-06-14

申请号：US13040415

申请日：2011-03-04

申请人： Yeh-Jen HUANG ,  Yeh-Ning Jou ,  Ming-Dou Ker ,  Wen-Yi Chen ,  Chia-Wei Hung ,  Hwa-Chyi Chiou

发明人： Yeh-Jen HUANG ,  Yeh-Ning Jou ,  Ming-Dou Ker ,  Wen-Yi Chen ,  Chia-Wei Hung ,  Hwa-Chyi Chiou

IPC分类号： H01L23/62

CPC分类号： H01L23/62 ,  H01L27/0262 ,  H01L2924/0002 ,  H01L2924/00

摘要： An electrostatic discharge (ESD) protection device including a substrate, a first doped region, a second doped region, and a third doped region, a gate and a plurality of contacts is disclosed. The substrate includes a first conductive type. The first doped region is formed in the substrate and includes a second conductive type. The second doped region is formed in the substrate and includes the second conductive type. The third doped region is formed in the substrate, includes the first conductive type and is located between the first and the second doped regions. The gate is formed on the substrate, located between the first and the second doped regions and comprises a first through hole. The contacts pass through the first through hole to contact with the third doped region.

摘要翻译： 公开了一种包括衬底，第一掺杂区域，第二掺杂区域和第三掺杂区域的静电放电（ESD）保护器件，栅极和多个触点。 基板包括第一导电类型。 第一掺杂区域形成在衬底中并且包括第二导电类型。 第二掺杂区域形成在衬底中并且包括第二导电类型。 第三掺杂区域形成在衬底中，包括第一导电类型并且位于第一和第二掺杂区域之间。 栅极形成在衬底上，位于第一和第二掺杂区之间，并且包括第一通孔。 触点通过第一通孔以与第三掺杂区域接触。

公开(公告)号：US20110043953A1

公开(公告)日：2011-02-24

申请号：US12543468

申请日：2009-08-18

申请人： Ming-Dou Ker ,  Chun-Yu Lin ,  Fu-Yi Tsai

发明人： Ming-Dou Ker ,  Chun-Yu Lin ,  Fu-Yi Tsai

IPC分类号： H02H9/00

CPC分类号： H02H9/046

摘要： An ESD protection circuit has a merged triggering mechanism. The ESD protection circuit comprises: an ESD detection circuit, for detecting an ESD voltage to generate a control signal; a first type ESD protection device, for outputting a first trigger current; a second type ESD protection device, for receiving a second trigger current; and a trigger circuit, for constituting a conductive path according to the control signal, such that the trigger circuit can receive the first trigger current from the first type ESD protection device and outputs the second trigger current to the second type ESD protection device.

摘要翻译： ESD保护电路具有合并的触发机制。 ESD保护电路包括：ESD检测电路，用于检测ESD电压以产生控制信号; 第一类ESD保护装置，用于输出第一触发电流; 第二类ESD保护装置，用于接收第二触发电流; 以及触发电路，用于根据控制信号构成导电路径，使得触发电路可以从第一类ESD保护装置接收第一触发电流，并将第二触发电流输出到第二类ESD保护装置。