Servo Zone Detector
    81.
    发明申请
    Servo Zone Detector 有权
    伺服区检测器

    公开(公告)号:US20130329313A1

    公开(公告)日:2013-12-12

    申请号:US13490913

    申请日:2012-06-07

    IPC分类号: G11B27/24 G11B5/09

    CPC分类号: G11B5/59655 G11B5/59688

    摘要: The present inventions are related to systems and methods for transferring information to and from a storage medium, and more particularly to systems and methods for positioning a sensor in relation to a storage medium. For example, an apparatus for determining a sensor position is disclosed that includes discrete Fourier transform calculators operable to process input data to yield a magnitude response of the input data at each of a number of candidate frequencies, a comparator operable to compare the magnitude responses to yield a winning candidate frequency, a servo controller operable to process at least one servo field in the input data to identify a position of a sensor based on the at least one servo field, and a servo frequency synthesizer operable to establish a frequency of operation in the servo controller based at least in part on the winning candidate frequency.

    摘要翻译: 本发明涉及用于将信息传送到存储介质和从存储介质传送信息的系统和方法,更具体地涉及用于相对于存储介质定位传感器的系统和方法。 例如,公开了一种用于确定传感器位置的装置,其包括离散付里叶变换计算器,其可操作以处理输入数据以在多个候选频率的每一个处产生输入数据的幅度响应,比较器,可操作以将幅度响应与 产生获胜候选频率,伺服控制器,其可操作以处理所述输入数据中的至少一个伺服字段,以基于所述至少一个伺服字段识别传感器的位置;以及伺服频率合成器,其可操作以建立操作频率 所述伺服控制器至少部分地基于所述获胜候选频率。

    Systems and methods for user data based fly height calculation
    83.
    发明授权
    Systems and methods for user data based fly height calculation 有权
    基于用户数据的飞行高度计算的系统和方法

    公开(公告)号:US08526133B2

    公开(公告)日:2013-09-03

    申请号:US13185562

    申请日:2011-07-19

    IPC分类号: G11B21/02

    CPC分类号: G11B5/6029

    摘要: Various embodiments of the present invention provide systems and methods for calculating and/or modifying fly height. For example, a circuit for calculating fly height is disclosed that includes: a first pattern detector circuit, a second pattern detector circuit, a first pattern fly height calculation circuit, a second pattern fly height calculation circuit, a first averaging circuit, a second averaging circuit, and a combining circuit.

    摘要翻译: 本发明的各种实施例提供了用于计算和/或修改飞行高度的系统和方法。 例如,公开了一种用于计算飞行高度的电路,其包括:第一模式检测器电路,第二模式检测器电路,第一模式飞行高度计算电路,第二模式飞行高度计算电路,第一平均电路,第二平均 电路和组合电路。

    Systems and Methods for Zone Servo Timing Gain Recovery
    85.
    发明申请
    Systems and Methods for Zone Servo Timing Gain Recovery 有权
    区域伺服定时增益恢复系统与方法

    公开(公告)号:US20130148226A1

    公开(公告)日:2013-06-13

    申请号:US13316899

    申请日:2011-12-12

    IPC分类号: G11B5/09

    CPC分类号: G11B5/59688 G11B5/59622

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing system is disclosed that includes Various embodiments of the present invention provide data processing systems that include an analog to digital converter circuit and a phase and gain computation circuit. The analog to digital converter circuit is operable to convert an analog input into a series of digital samples. At least a portion of the series of digitals samples represent a periodic signal from a servo data region. The phase and gain computation circuit is operable to: determine an approximate amplitude of the periodic signal based at least in part upon the digital samples representing the periodic signal from the servo data region; determine a gain based at least in part on the approximate amplitude; and determine a phase based at least in part on the approximate amplitude.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了一种数据处理系统,其包括本发明的各种实施例,其提供包括模数转换器电路和相位和增益计算电路的数据处理系统。 模数转换器电路可操作以将模拟输入转换为一系列数字采样。 一系列数字采样的至少一部分表示来自伺服数据区的周期性信号。 相位和增益计算电路可操作以:至少部分地基于表示来自伺服数据区域的周期信号的数字采样来确定周期信号的近似幅度; 至少部分地基于近似幅度确定增益; 并且至少部分地基于近似幅度来确定相位。

    Systems and Methods for Parity Shared Data Encoding
    86.
    发明申请
    Systems and Methods for Parity Shared Data Encoding 有权
    用于奇偶校验共享数据编码的系统和方法

    公开(公告)号:US20130091400A1

    公开(公告)日:2013-04-11

    申请号:US13269852

    申请日:2011-10-10

    IPC分类号: H03M13/05 G06F11/10

    摘要: Various embodiments of the present invention provide systems and methods for data processing. For example, a low density parity check encoding system is described that includes: a low density parity check encoder circuit, and a combining circuit. The low density parity check encoder circuit is operable to encode a first data set to yield a first low density parity check encoded sub-codeword, and to encode a second data set to yield a second low density parity check encoded sub-codeword. The combining circuit is operable to: generate a composite low density parity check sub-codeword by mathematically combining at least the first low density parity check encoded sub-codeword and the second low density parity check encoded sub-codeword; and combine at least the first low density parity check encoded sub-codeword and the composite low density parity check sub-codeword into an overall codeword.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 例如,描述了一种低密度奇偶校验编码系统,其包括:低密度奇偶校验编码器电路和组合电路。 低密度奇偶校验编码器电路可操作以对第一数据集进行编码以产生第一低密度奇偶校验编码子码字,并对第二数据集进行编码以产生第二低密度奇偶校验编码子码字。 组合电路可操作用于:通过至少第一低密度奇偶校验编码子码字和第二低密度奇偶校验编码子码字数学地组合来生成复合低密度奇偶校验子码字; 并且将至少第一低密度奇偶校验编码子码字和复合低密度奇偶校验子码字组合成总码字。

    Preamble acquisition without second order timing loops
    87.
    发明授权
    Preamble acquisition without second order timing loops 有权
    前导采集无二阶定时循环

    公开(公告)号:US08320512B2

    公开(公告)日:2012-11-27

    申请号:US13291024

    申请日:2011-11-07

    IPC分类号: H04L7/00

    CPC分类号: H04L7/08

    摘要: A clock is adjusted by obtaining a first plurality of samples and a second plurality of samples associated with a preamble portion of a data packet. The first plurality of samples and the second plurality of samples are sampled using a clock. A first intermediate value is determined based at least in part on the first plurality of samples and a second intermediate value is determined based at least in part on the second plurality of samples. An ending value associated with an end of the preamble portion is determined based at least in part on the first intermediate value and the second intermediate value. The clock is adjusted based at least in part on the ending value without use of a second order timing loop.

    摘要翻译: 通过获得与数据分组的前导部分相关联的第一多个样本和第二多个样本来调整时钟。 使用时钟对第一多个采样和第二多个采样进行采样。 至少部分地基于第一多个样本确定第一中间值,并且至少部分地基于第二多个样本来确定第二中间值。 至少部分地基于第一中间值和第二中间值来确定与前导码部分的结尾相关联的结束值。 时钟至少部分地基于结束值进行调整,而不使用二阶定时循环。

    Systems and Methods for Data Pre-Coding Calibration
    88.
    发明申请
    Systems and Methods for Data Pre-Coding Calibration 有权
    数据预编码校准系统与方法

    公开(公告)号:US20120212849A1

    公开(公告)日:2012-08-23

    申请号:US13031818

    申请日:2011-02-22

    IPC分类号: G11B5/00 H04L27/01

    摘要: Various embodiments of the present invention provide systems and methods for selecting between pre-coding and non-pre-coding. As an example, a data processing circuit is disclosed that includes: a first data detector circuit, a second data detector circuit, a first comparator circuit, a second comparator circuit, and a pre-code selection circuit. The first data detector circuit is selectably configurable to operate in a pre-coded state, and operable to apply a data detection algorithm on a data input to yield a first detected output. The second data detector circuit operable to apply the data detection algorithm to the data input to yield a second detected output without compensating for pre-coding. The first comparator circuit operable to compare the first detected output against a known input to yield a first comparison value, and the second comparator circuit operable to compare the second detected output against the known input to yield a second comparison value. The pre-code selection circuit is operable to determine a selectable configuration of the first data detector circuit based at least in part on the first comparison value and the second comparison value.

    摘要翻译: 本发明的各种实施例提供了用于在预编码和非预编码之间进行选择的系统和方法。 作为示例,公开了一种数据处理电路,其包括:第一数据检测器电路,第二数据检测器电路,第一比较器电路,第二比较器电路和预代码选择电路。 第一数据检测器电路可选择地被配置为以预编码状态操作,并且可操作以将数据检测算法应用于数据输入以产生第一检测输出。 第二数据检测器电路可操作以将数据检测算法应用于数据输入以产生第二检测输出而不补偿预编码。 第一比较器电路可操作以将第一检测输出与已知输入进行比较以产生第一比较值,并且第二比较器电路可操作以将第二检测输出与已知输入进行比较以产生第二比较值。 预编码选择电路可操作以至少部分地基于第一比较值和第二比较值来确定第一数据检测器电路的可选配置。

    Systems and Methods for Data Detection Using Distance Based Tuning
    89.
    发明申请
    Systems and Methods for Data Detection Using Distance Based Tuning 有权
    使用基于距离的调整进行数据检测的系统和方法

    公开(公告)号:US20120207201A1

    公开(公告)日:2012-08-16

    申请号:US13310028

    申请日:2011-12-02

    IPC分类号: H04L27/01

    CPC分类号: H04L25/03254 H04L25/0305

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes an equalizer circuit and a data detection circuit. The equalizer circuit is operable to filter a series of samples based at least in part on a filter coefficient and to provide a corresponding series of filtered samples. The data detection circuit includes: a core data detector circuit and a coefficient determination circuit. The core data detector circuit is operable to perform a data detection process on the series of filtered samples and to provide a most likely path and a next most likely path. The coefficient determination circuit operable to update the filter coefficient based at least in part on the most likely path and the next most likely path.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了包括均衡器电路和数据检测电路的数据处理电路。 均衡器电路可操作以至少部分地基于滤波器系数对一系列样本进行滤波,并提供相应的一系列滤波样本。 数据检测电路包括:核心数据检测器电路和系数确定电路。 核心数据检测器电路可操作以对一系列经滤波的样本执行数据检测处理,并提供最可能的路径和下一个最可能的路径。 系数确定电路可操作以至少部分地基于最可能的路径和下一个最可能的路径来更新滤波器系数。