摘要:
The present inventions are related to systems and methods for transferring information to and from a storage medium, and more particularly to systems and methods for positioning a sensor in relation to a storage medium. For example, an apparatus for determining a sensor position is disclosed that includes discrete Fourier transform calculators operable to process input data to yield a magnitude response of the input data at each of a number of candidate frequencies, a comparator operable to compare the magnitude responses to yield a winning candidate frequency, a servo controller operable to process at least one servo field in the input data to identify a position of a sensor based on the at least one servo field, and a servo frequency synthesizer operable to establish a frequency of operation in the servo controller based at least in part on the winning candidate frequency.
摘要:
Various embodiments of the present invention provide systems and methods for calculating and/or modifying fly height. For example, a circuit for calculating fly height is disclosed that includes: a first pattern detector circuit, a second pattern detector circuit, a first pattern fly height calculation circuit, a second pattern fly height calculation circuit, a first averaging circuit, a second averaging circuit, and a combining circuit.
摘要:
The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for adaptively modifying a scaling factor in a data processing system.
摘要:
Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing system is disclosed that includes Various embodiments of the present invention provide data processing systems that include an analog to digital converter circuit and a phase and gain computation circuit. The analog to digital converter circuit is operable to convert an analog input into a series of digital samples. At least a portion of the series of digitals samples represent a periodic signal from a servo data region. The phase and gain computation circuit is operable to: determine an approximate amplitude of the periodic signal based at least in part upon the digital samples representing the periodic signal from the servo data region; determine a gain based at least in part on the approximate amplitude; and determine a phase based at least in part on the approximate amplitude.
摘要:
Various embodiments of the present invention provide systems and methods for data processing. For example, a low density parity check encoding system is described that includes: a low density parity check encoder circuit, and a combining circuit. The low density parity check encoder circuit is operable to encode a first data set to yield a first low density parity check encoded sub-codeword, and to encode a second data set to yield a second low density parity check encoded sub-codeword. The combining circuit is operable to: generate a composite low density parity check sub-codeword by mathematically combining at least the first low density parity check encoded sub-codeword and the second low density parity check encoded sub-codeword; and combine at least the first low density parity check encoded sub-codeword and the composite low density parity check sub-codeword into an overall codeword.
摘要:
A clock is adjusted by obtaining a first plurality of samples and a second plurality of samples associated with a preamble portion of a data packet. The first plurality of samples and the second plurality of samples are sampled using a clock. A first intermediate value is determined based at least in part on the first plurality of samples and a second intermediate value is determined based at least in part on the second plurality of samples. An ending value associated with an end of the preamble portion is determined based at least in part on the first intermediate value and the second intermediate value. The clock is adjusted based at least in part on the ending value without use of a second order timing loop.
摘要:
Various embodiments of the present invention provide systems and methods for selecting between pre-coding and non-pre-coding. As an example, a data processing circuit is disclosed that includes: a first data detector circuit, a second data detector circuit, a first comparator circuit, a second comparator circuit, and a pre-code selection circuit. The first data detector circuit is selectably configurable to operate in a pre-coded state, and operable to apply a data detection algorithm on a data input to yield a first detected output. The second data detector circuit operable to apply the data detection algorithm to the data input to yield a second detected output without compensating for pre-coding. The first comparator circuit operable to compare the first detected output against a known input to yield a first comparison value, and the second comparator circuit operable to compare the second detected output against the known input to yield a second comparison value. The pre-code selection circuit is operable to determine a selectable configuration of the first data detector circuit based at least in part on the first comparison value and the second comparison value.
摘要:
Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes an equalizer circuit and a data detection circuit. The equalizer circuit is operable to filter a series of samples based at least in part on a filter coefficient and to provide a corresponding series of filtered samples. The data detection circuit includes: a core data detector circuit and a coefficient determination circuit. The core data detector circuit is operable to perform a data detection process on the series of filtered samples and to provide a most likely path and a next most likely path. The coefficient determination circuit operable to update the filter coefficient based at least in part on the most likely path and the next most likely path.
摘要:
Data is processed by receiving data having a value. The amplitude of the received data is adjusted using the processor based at least in part on the value of the received data to obtain modified data.