Inter-layer picture signaling and related processes

    公开(公告)号:US11438609B2

    公开(公告)日:2022-09-06

    申请号:US14242526

    申请日:2014-04-01

    Abstract: In one implementation, an apparatus is provided for encoding or decoding video information. The apparatus comprises a memory configured to store inter-layer reference pictures associated with a current picture that is being coded. The apparatus further comprises a processor operationally coupled to the memory. In one embodiment, the processor is configured to indicate a number of inter-layer reference pictures to use to predict the current picture using inter-layer prediction. The processor is also configured to indicate which of the inter-layer reference pictures to use to predict the current picture using inter-layer prediction. The processor is also configured to determine an inter-layer reference picture set associated with the current picture using the indication of the number of inter-layer reference pictures and the indication of which of the inter-layer reference pictures to use to predict the current picture using inter-layer prediction.

    Low-complexity design for FRUC
    82.
    发明授权

    公开(公告)号:US11297340B2

    公开(公告)日:2022-04-05

    申请号:US16820152

    申请日:2020-03-16

    Abstract: A method of decoding video data includes constructing, by a video decoder implemented in processing circuitry, a candidate list of motion vector information for a portion of a current frame. The method includes receiving, by the video decoder, signaling information indicating starting motion vector information of the candidate list of motion vector information, the starting motion vector information indicating an initial position in a reference frame. The method includes refining, by the video decoder, based on one or more of bilateral matching or template matching, the starting motion vector information to determine refined motion vector information indicating a refined position in the reference frame that is within a search range from the initial position. The method includes generating, by the video decoder, a predictive block based on the refined motion vector information and decoding, by the video decoder, the current frame based on the predictive block.

    SIGNALING NUMBER OF SUBBLOCK MERGE CANDIDATES IN VIDEO CODING

    公开(公告)号:US20210314598A1

    公开(公告)日:2021-10-07

    申请号:US17222380

    申请日:2021-04-05

    Abstract: An example method includes encoding, in a video bitstream, a first syntax element specifying whether affine model based motion compensation is enabled; based on affine model based motion compensation being enabled, encoding, in the video bitstream, a second syntax element specifying a maximum number of subblock-based merging motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value other than a value of the first syntax element; and encoding a picture of the video data based on the maximum number of subblock-based merging motion vector prediction candidates.

    BLOCK PARTITIONING FOR IMAGE AND VIDEO CODING

    公开(公告)号:US20210314567A1

    公开(公告)日:2021-10-07

    申请号:US17220546

    申请日:2021-04-01

    Abstract: A video encoder and video decoder are configured to determine a partitioning for a picture of video data based on a virtual pipeline data unit (VPDU) size. For example, the video encoder and video decoder may determine a maximum ternary tree size to be in the range of a minimum allowed block size to a minimum of the VPDU size and a maximum coding tree unit (CTU) size, and/or determine a minimum quadtree size to be in the range of a minimum allowed block size to a minimum of the VPDU size and the maximum CTU size.

    Tree-type coding for video coding
    87.
    发明授权

    公开(公告)号:US11089339B2

    公开(公告)日:2021-08-10

    申请号:US16798039

    申请日:2020-02-21

    Abstract: An example device includes a memory to store the video data, and processing circuitry in communication with the memory. The processing circuitry is configured to compare a value of a dimension of a current block of the stored video data to a value of a corresponding dimension of a neighboring block of the current block to obtain a relative dimension value. The processing circuitry is further configured to determine, based on the relative dimension value, that the current block is to be partitioned according to a prediction tree (PT) portion of a multi-type tree-based partitioning scheme. The PT portion comprises partitioning according to one of a binary tree structure or a center-side triple tree structure. The processing circuitry is further configured to partition, based on the determination, the current block according to the PT portion, to form a plurality of sub-blocks.

    Motion vector prediction for affine motion models in video coding

    公开(公告)号:US11082687B2

    公开(公告)日:2021-08-03

    申请号:US16601486

    申请日:2019-10-14

    Abstract: A video decoder selects a source affine block. The source affine block is an affine-coded block that spatially neighbors a current block. Additionally, the video decoder extrapolates motion vectors of control points of the source affine block to determine motion vector predictors for control points of the current block. The video decoder inserts, into an affine motion vector predictor (MVP) set candidate list, an affine MVP set that includes the motion vector predictors for the control points of the current block. The video decoder also determines, based on an index signaled in a bitstream, a selected affine MVP set in the affine MVP set candidate list. The video decoder obtains, from the bitstream, motion vector differences (MVDs) that indicate differences between motion vectors of the control points of the current block and motion vector predictors in the selected affine MVP set.

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