METHOD FOR SPEEDING UP PAGE TABLE ADDRESS UPDATE ON VIRTUAL MACHINE
    81.
    发明申请
    METHOD FOR SPEEDING UP PAGE TABLE ADDRESS UPDATE ON VIRTUAL MACHINE 失效
    用于在虚拟机上加速页面地址更新的方法

    公开(公告)号:US20070162683A1

    公开(公告)日:2007-07-12

    申请号:US11621609

    申请日:2007-01-10

    IPC分类号: G06F12/00

    摘要: A method is provided which eliminates redundancy from the shadow PT operation performed by the VMM when the guest operating system running on a virtual machine updates a guest PT address. The VMM associates a plurality of shadow PTs with guest PTs and allocates their relation in memory. When it detects the update of a guest PT address, the VMM searches for a shadow PT corresponding to the updated guest PT. If the associated shadow PT exists, the VMM omits rewriting the shadow PT and registers the address of the shadow PT with the CPU. If the associated shadow PT does not exist, the VMM allocates a memory, creates a shadow PT, registers an address of the created shadow PT with the CPU, and records a relationship between the updated guest PT and the generated shadow PT.

    摘要翻译: 当在虚拟机上运行的客机操作系统更新客户PT地址时,提供一种消除由VMM执行的阴影PT操作的冗余的方法。 VMM将多个阴影PT与客户PT相关联,并将其关系分配给内存。 当检测到客户PT地址的更新时,VMM搜索与更新的客户PT相对应的影子PT。 如果相关的阴影PT存在,则VMM将省略重写阴影PT,并向CPU注册阴影PT的地址。 如果相关联的阴影PT不存在,则VMM分配存储器,创建阴影PT,向CPU注册创建的阴影PT的地址,并记录更新的客户PT与生成的阴影PT之间的关系。

    COMPUTER SYSTEM FOR SHARING I/O DEVICE
    82.
    发明申请
    COMPUTER SYSTEM FOR SHARING I/O DEVICE 有权
    用于共享I / O设备的计算机系统

    公开(公告)号:US20070143395A1

    公开(公告)日:2007-06-21

    申请号:US11561557

    申请日:2006-11-20

    IPC分类号: G06F15/16

    CPC分类号: G06F13/385

    摘要: Provided is a computer system in which an I/O card is shared among physical servers and logical servers. Servers are set in advance such that one I/O card is used exclusively by one physical or logical server, or shared among a plurality of servers. An I/O hub allocates a virtual MM I/O address unique to each physical or logical server to a physical MM I/O address associated with each I/O card. The I/O hub keeps allocation information indicating the relation between the allocated virtual MM I/O address, the physical MM I/O address, and a server identifier unique to each physical or logical server. When a request to access an I/O card is sent from a physical or logical server, the allocation information is referred to and a server identifier is extracted from the access request. The extracted server identifier is used to identify the physical or logical server that has made the access request.

    摘要翻译: 提供了在物理服务器和逻辑服务器之间共享I / O卡的计算机系统。 服务器预先设置,使得一个I / O卡由一个物理或逻辑服务器专门使用,或者在多个服务器之间共享。 I / O集线器将每个物理或逻辑服务器唯一的虚拟MM I / O地址分配给与每个I / O卡相关联的物理MM I / O地址。 I / O集线器保持指示分配的虚拟MM I / O地址,物理MM I / O地址与每个物理或逻辑服务器唯一的服务器标识之间的关系的分配信息。 当从物理或逻辑服务器发送访问I / O卡的请求时,参考分配信息并从访问请求中提取服务器标识符。 提取的服务器标识符用于标识已进行访问请求的物理或逻辑服务器。

    Data processing system for keeping isolation between logical partitions

    公开(公告)号:US07080291B2

    公开(公告)日:2006-07-18

    申请号:US10372266

    申请日:2003-02-25

    IPC分类号: G06F11/00

    CPC分类号: G06F9/5077

    摘要: When a subject of access of a transaction from an IO device is not any resource allocated to a logical partition to which the device having issued the transaction belongs, a report as an error is sent to a CPU, while the transaction is finished on the IO bus. To prevent a transaction between IO devices from gaining access to any resource in another logical partition, one access permission bit is provided for each combination of all the IO devices, and the access is permitted only when the bit has a predetermined value. A reset signal is provided by IO slot so that only an IO slot allocated to a specific logical partition can be reset without affecting any other logical partition. A transaction issued from an IO device in one logical partition is prevented from gaining access to a resource in another logical partition, while proper error handling can be performed.

    Control method for virtual machine
    84.
    发明申请
    Control method for virtual machine 审中-公开
    虚拟机的控制方法

    公开(公告)号:US20060064523A1

    公开(公告)日:2006-03-23

    申请号:US11195742

    申请日:2005-08-03

    IPC分类号: G06F13/38

    摘要: An object of this invention is to prevent logical partitions used by users from being affected by faults or errors in I/O devices. According to this invention, in an I/O device control method in which I/O devices connected to a computer are allocated among a plurality of logical partitions constructed of a hypervisor (10), the hypervisor (10) sets the logical partitions as a user LPAR to be provided to a user and as an I/O LPAR for controlling an I/O device, allocates the I/O device to the I/O LPAR, and an association between the user LPAR and the logical I/O LPAR is set by an I/O device table.

    摘要翻译: 本发明的一个目的是防止用户使用的逻辑分区受I / O设备中的故障或错误的影响。 根据本发明,在由管理程序(10)构成的多个逻辑分区中分配连接到计算机的I / O设备的I / O设备控制方法中,管理程序(10)将逻辑分区设置为 用户LPAR提供给用户和用作控制I / O设备的I / O LPAR,将I / O设备分配给I / O LPAR,以及用户LPAR与逻辑I / O LPAR之间的关联 由I / O设备表设置。

    Data processing system with fabric for sharing an I/O device between logical partitions
    85.
    发明申请
    Data processing system with fabric for sharing an I/O device between logical partitions 审中-公开
    具有用于在逻辑分区之间共享I / O设备的结构的数据处理系统

    公开(公告)号:US20050097384A1

    公开(公告)日:2005-05-05

    申请号:US10887889

    申请日:2004-07-12

    IPC分类号: G06F13/10 G06F9/46 G06F11/00

    CPC分类号: G06F12/1081 G06F13/1605

    摘要: The present invention makes coordination of I/O access operations of operating systems independently running in logical partitions. In a data processing system comprising processors, a main memory, I/O slots, and a node controller, wherein the processors, the main memory, and the I/O slots are interconnected via the node controller and divided into a plurality of partitions in which individual operating systems are run simultaneously, the node controller includes a logical partition arbitration unit which stores information as to whether each logical partition is using an I/O slot and controls access from each logical partition to an I/O slot by referring to the information thus stored.

    摘要翻译: 本发明协调在逻辑分区中独立运行的操作系统的I / O访问操作。 在包括处理器,主存储器,I / O插槽和节点控制器的数据处理系统中,其中处理器,主存储器和I / O时隙经由节点控制器互连,并被分成多个分区 各个操作系统同时运行,节点控制器包括逻辑分区仲裁单元,其存储关于每个逻辑分区是否正在使用I / O时隙的信息,并且通过参考所述I / O时隙来控制从每个逻辑分区到I / O时隙的访问 这样存储的信息。

    Processor for VLIW instruction
    86.
    发明授权
    Processor for VLIW instruction 失效
    处理器用于VLIW指令

    公开(公告)号:US6044450A

    公开(公告)日:2000-03-28

    申请号:US824486

    申请日:1997-03-27

    IPC分类号: G06F9/30 G06F9/38 G06F7/00

    摘要: Each small instruction in a VLIW instruction (long instruction) is added with the number of NOP instructions which succeed the small instruction, and these NOP instructions are deleted from the succeeding long instruction. A plurality of long instructions are therefore time-compressed. Thereafter, a plurality of small instructions in each long instruction are divided into a plurality of groups, and a combination of operation codes (OP codes) of small instructions in each group is replaced by a group code to generate a compressed, grouped instruction. Each long instruction is therefore space-compressed. An instruction expanding unit has an instruction expanding circuit for each grouped instruction. Each instruction expanding circuit expands one grouped instruction in a long instruction, generates a group of small instructions represented by the grouped instruction, and supplies the group of generated small instructions to respective function units via a decode unit. In this case, each instruction expanding circuit supplies after each small instruction NOP instructions same in number as that designated by a NOP number associated with each small instruction in this grouped instruction.

    摘要翻译: VLIW指令(长指令)中的每个小指令都加上小指令成功的NOP指令数,并从后续长指令中删除这些NOP指令。 因此,多个长指令被时间压缩。 此后,每个长指令中的多个小指令被分成多个组,并且组中的小指令的操作码(OP代码)的组合被组代码替换以生成压缩的分组指令。 因此,每个长指令都是空间压缩的。 指令扩展单元具有用于每个分组指令的指令扩展电路。 每个指令扩展电路在长指令中扩展一个分组指令,生成由分组指令表示的一组小指令,并且经由解码单元将所生成的小指令组提供给各个功能单元。 在这种情况下,每个指令扩展电路在与分组指令中的每个小指令相关联的NOP号指定的每个小指令NOP指令之后提供数量相同的每个指令扩展电路。