中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

220 records (took 0.074 seconds)

    TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF
    81.
    发明申请
    TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF 审中-公开

    公开(公告)号：US20200007167A1

    公开(公告)日：2020-01-02

    申请号：US16569821

    申请日：2019-09-13

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Se-ho MYUNG ,  Hong-sil JEONG ,  Kyung-joong KIM

    IPC: H03M13/27 ,  H03M13/11 ,  H04L1/00

    Abstract: A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.

    TRANSMITTER AND SHORTENING METHOD THEREOF
    82.
    发明申请
    TRANSMITTER AND SHORTENING METHOD THEREOF 审中-公开

    公开(公告)号：US20190334653A1

    公开(公告)日：2019-10-31

    申请号：US16504103

    申请日：2019-07-05

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hong-sil JEONG ,  Kyung-Joong KIM ,  Se-ho MYUNG

    IPC: H04L1/00 ,  H03M13/00 ,  H03M13/29 ,  H03M13/25 ,  H03M13/11 ,  H03M13/15

    Abstract: A transmitter is provided. The transmitter includes: an outer encoder configured to encode input bits to generate outer-encoded bits including the input bits and parity bits; a zero padder configured to generate a plurality of bit groups each of which is formed of a same number of bits, determine whether a number of the outer-encoded bits satisfies a predetermined number of bits required according to at least one of a code rate and a code length for Low Density Parity Check (LDPC) encoding, pads zero bits to some of the bits in the bit groups if the number of the outer-encoded bits is less than the predetermined number of bits, and maps the outer-encoded bits to remaining bits in the bit groups, based on a predetermined shortening pattern, thereby to constitute LDPC information bits; and an LDPC encoder configured to encode the LDPC information bits, wherein the some of the bits, in which zero bits are padded, are included in some of the bit groups which are not sequentially disposed in the LDPC information bits.

    TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF
    85.
    发明申请
    TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF 审中-公开

    公开(公告)号：US20190280716A1

    公开(公告)日：2019-09-12

    申请号：US16352142

    申请日：2019-03-13

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hong-sil JEONG ,  Kyung-Joong KIM ,  Se-ho MYUNG

    IPC: H03M13/11 ,  H04L1/00 ,  H03M13/27 ,  H04L27/36 ,  H03M13/00 ,  H03M13/25

    Abstract: Provided is a signal interleaving method which includes: interleaving parity bits by encoding input bits based on a low density parity check (LDPC) code according to a code rate of 6/15 and a code length of 64800; splitting a codeword comprising the input bits and the interleaved parity bits into a plurality of bit groups; interleaving the plurality of bit groups according to a specific permutation order to provide an interleaved codeword; de-multiplexing bits of the interleaved codeword to generate data cells; mapping the data cells onto constellation points for 1024-quadrature amplitude modulation (QAM); and transmitting a signal based on the constellation points.

Patent Agency Ranking