公开(公告)号：US20130119376A1

公开(公告)日：2013-05-16

申请号：US13666153

申请日：2012-11-01

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shinya SASAGAWA ,  Motomu KURATA ,  Hideaki KUWABARA ,  Mari TERASHIMA

IPC: H01L29/66 ,  H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/41758 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78696

Abstract: To provide a highly reliable semiconductor device including a transistor using an oxide semiconductor. After a source electrode layer and a drain electrode layer are formed, an island-like oxide semiconductor layer is formed in a gap between these electrode layers so that a side surface of the oxide semiconductor layer is covered with a wiring, whereby light is prevented from entering the oxide semiconductor layer through the side surface. Further, a gate electrode layer is formed over the oxide semiconductor layer with a gate insulating layer interposed therebetween and impurities are introduced with the gate electrode layer used as a mask. Then, a conductive layer is provided on a side surface of the gate electrode layer in the channel length direction, whereby an Lov region is formed while maintaining a scaled-down channel length and entry of light from above into the oxide semiconductor layer is prevented.

Abstract translation: 提供包括使用氧化物半导体的晶体管的高度可靠的半导体器件。 在形成源电极层和漏电极层之后，在这些电极层之间的间隙中形成岛状氧化物半导体层，使得氧化物半导体层的侧表面被布线覆盖，从而防止光 通过侧面进入氧化物半导体层。 此外，在氧化物半导体层上形成栅极电极层，其间插入有栅极绝缘层，并且将杂质与用作掩模的栅极电极层一起引入。 然后，在栅极电极层的沟道长度方向的侧面上设置导电层，由此形成Lov区，同时保持按比例缩小的沟道长度，并且防止从上方进入到氧化物半导体层的光。