公开(公告)号：US20140186998A1

公开(公告)日：2014-07-03

申请号：US14199222

申请日：2014-03-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi KOEZUKA ,  Naoto YAMADE ,  Kyoko YOSHIOKA ,  Yuhei SATO ,  Mari TERASHIMA

IPC: H01L29/66 ,  H01L21/02

CPC classification number: H01L29/66969 ,  H01L21/02667 ,  H01L29/78606 ,  H01L29/78693

Abstract: A highly reliable semiconductor device which is formed using an oxide semiconductor and has stable electric characteristics is provided. A semiconductor device which includes an amorphous oxide semiconductor layer including a region containing oxygen in a proportion higher than that in the stoichiometric composition, and an aluminum oxide film provided over the amorphous oxide semiconductor layer is provided. The amorphous oxide semiconductor layer is formed as follows: oxygen implantation treatment is performed on a crystalline or amorphous oxide semiconductor layer which has been subjected to dehydration or dehydrogenation treatment, and then thermal treatment is performed on the oxide semiconductor layer provided with an aluminum oxide film at a temperature lower than or equal to 450° C.

Abstract translation: 提供了使用氧化物半导体形成且具有稳定的电特性的高度可靠的半导体器件。 提供一种半导体器件，其包括非晶氧化物半导体层，所述非晶氧化物半导体层包括含有比所述化学计量组成中高的比例的氧的区域，以及设置在所述非晶氧化物半导体层上的氧化铝膜。 无定形氧化物半导体层如下形成：对已进行脱水或脱氢处理的结晶或非晶氧化物半导体层进行氧注入处理，然后对设置有氧化铝膜的氧化物半导体层进行热处理 在低于或等于450℃的温度下

公开(公告)号：US20140339552A1

公开(公告)日：2014-11-20

申请号：US14448024

申请日：2014-07-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shinya SASAGAWA ,  Motomu KURATA ,  Hideaki KUWABARA ,  Mari TERASHIMA

IPC: H01L29/786 ,  H01L29/417

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/41758 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78696

Abstract: To provide a highly reliable semiconductor device including a transistor using an oxide semiconductor. After a source electrode layer and a drain electrode layer are formed, an island-like oxide semiconductor layer is formed in a gap between these electrode layers so that a side surface of the oxide semiconductor layer is covered with a wiring, whereby light is prevented from entering the oxide semiconductor layer through the side surface. Further, a gate electrode layer is formed over the oxide semiconductor layer with a gate insulating layer interposed therebetween and impurities are introduced with the gate electrode layer used as a mask. Then, a conductive layer is provided on a side surface of the gate electrode layer in the channel length direction, whereby an Lov region is formed while maintaining a scaled-down channel length and entry of light from above into the oxide semiconductor layer is prevented.

Abstract translation: 提供包括使用氧化物半导体的晶体管的高度可靠的半导体器件。 在形成源电极层和漏电极层之后，在这些电极层之间的间隙中形成岛状氧化物半导体层，使得氧化物半导体层的侧表面被布线覆盖，从而防止光 通过侧面进入氧化物半导体层。 此外，在氧化物半导体层上形成栅极电极层，其间插入有栅极绝缘层，并且将杂质与用作掩模的栅极电极层一起引入。 然后，在栅极电极层的沟道长度方向的侧面上设置导电层，由此形成Lov区，同时保持按比例缩小的沟道长度，防止从上方入射到氧化物半导体层中的光。

公开(公告)号：US20140014954A1

公开(公告)日：2014-01-16

申请号：US14024962

申请日：2013-09-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiromichi GODO ,  Yasuyuki ARAI ,  Satohiro OKAMOTO ,  Mari TERASHIMA ,  Eriko NISHIDA ,  Junpei SUGAO

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/78606

Abstract: An object is to provide a semiconductor device including an oxide semiconductor in which miniaturization is achieved while favorable characteristics are maintained. The semiconductor includes an oxide semiconductor layer, a source electrode and a drain electrode in contact with the oxide semiconductor layer, a gate electrode overlapping with the oxide semiconductor layer, a gate insulating layer provided between the oxide semiconductor layer and the gate electrode, and an insulating layer provided in contact with the oxide semiconductor layer. A side surface of the oxide semiconductor layer is in contact with the source electrode or the drain electrode. An upper surface of the oxide semiconductor layer overlaps with the source electrode or the drain electrode with the insulating layer interposed between the oxide semiconductor layer and the source electrode or the drain electrode.

Abstract translation: 本发明的目的是提供一种包括氧化物半导体的半导体器件，其中实现了小型化，同时保持了有利的特性。 半导体包括与氧化物半导体层接触的氧化物半导体层，源电极和漏电极，与氧化物半导体层重叠的栅电极，设置在氧化物半导体层和栅电极之间的栅极绝缘层，以及 绝缘层设置成与氧化物半导体层接触。 氧化物半导体层的侧表面与源电极或漏电极接触。 氧化物半导体层的上表面与源电极或漏电极重叠，绝缘层介于氧化物半导体层与源电极或漏电极之间。

公开(公告)号：US20130119376A1

公开(公告)日：2013-05-16

申请号：US13666153

申请日：2012-11-01

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shinya SASAGAWA ,  Motomu KURATA ,  Hideaki KUWABARA ,  Mari TERASHIMA

IPC: H01L29/66 ,  H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/41758 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78696

Abstract: To provide a highly reliable semiconductor device including a transistor using an oxide semiconductor. After a source electrode layer and a drain electrode layer are formed, an island-like oxide semiconductor layer is formed in a gap between these electrode layers so that a side surface of the oxide semiconductor layer is covered with a wiring, whereby light is prevented from entering the oxide semiconductor layer through the side surface. Further, a gate electrode layer is formed over the oxide semiconductor layer with a gate insulating layer interposed therebetween and impurities are introduced with the gate electrode layer used as a mask. Then, a conductive layer is provided on a side surface of the gate electrode layer in the channel length direction, whereby an Lov region is formed while maintaining a scaled-down channel length and entry of light from above into the oxide semiconductor layer is prevented.

Abstract translation: 提供包括使用氧化物半导体的晶体管的高度可靠的半导体器件。 在形成源电极层和漏电极层之后，在这些电极层之间的间隙中形成岛状氧化物半导体层，使得氧化物半导体层的侧表面被布线覆盖，从而防止光 通过侧面进入氧化物半导体层。 此外，在氧化物半导体层上形成栅极电极层，其间插入有栅极绝缘层，并且将杂质与用作掩模的栅极电极层一起引入。 然后，在栅极电极层的沟道长度方向的侧面上设置导电层，由此形成Lov区，同时保持按比例缩小的沟道长度，并且防止从上方进入到氧化物半导体层的光。