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公开(公告)号:US11614816B2
公开(公告)日:2023-03-28
申请号:US17335186
申请日:2021-06-01
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake , Takahiro Fukutome
IPC: G06F3/041 , G06F3/044 , G02F1/1362 , G02F1/1368 , G06F3/045 , G06F3/047 , G02F1/1333
Abstract: Sensing time of a touch sensor is shortened to increase responsiveness of touch sensing. A display device includes a gate driver, a plurality of touch sensors, and a plurality of touch wirings. The gate driver has a function of supplying a scan signal to the plurality of touch wirings at the same timing, and the touch sensors in different positions sense a plurality of touches at the same timing. In this manner, the responsiveness of touch sensing is increased. The gate driver has a function of controlling a scan signal for refreshing display and a scan signal used by the touch sensor for sensing.
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公开(公告)号:US11609613B2
公开(公告)日:2023-03-21
申请号:US17585680
申请日:2022-01-27
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yoshiharu Hirakata , Hiroyuki Miyake , Seiko Inoue , Shunpei Yamazaki
Abstract: A display device with low power consumption is provided. Furthermore, a display device in which an image is displayed in a region that can be used in a folded state is provided. The conceived display device includes a display portion that can be opened and folded, a sensing portion that senses a folded state of the display portion, and an image processing portion that generates, when the display portion is in the folded state, an image in which a black image is displayed in part of the display portion.
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公开(公告)号:US11468860B2
公开(公告)日:2022-10-11
申请号:US17458656
申请日:2021-08-27
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Seiko Amano , Hiroyuki Miyake
IPC: G09G3/36 , G06F3/038 , G09G3/3266 , G11C19/28 , G06F1/3234 , H01L27/12 , G09G5/00
Abstract: In a pulse output circuit in a shift register, a power source line which is connected to a transistor in an output portion connected to a pulse output circuit at the next stage is set to a low-potential drive voltage, and a power source line which is connected to a transistor in an output portion connected to a scan signal line is set to a variable potential drive voltage. The variable potential drive voltage is the low-potential drive voltage in a normal mode, and can be either a high-potential drive voltage or the low-potential drive voltage in a batch mode. In the batch mode, display scan signals can be output to a plurality of scan signal lines at the same timing in a batch.
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公开(公告)号:US20220146872A1
公开(公告)日:2022-05-12
申请号:US17582167
申请日:2022-01-24
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Atsushi Umezaki , Hiroyuki Miyake
IPC: G02F1/1368 , G02F1/1362
Abstract: An object of the invention is to provide a circuit technique which enables reduction in power consumption and high definition of a display device. A switch controlled by a start signal is provided to a gate electrode of a transistor, which is connected to a gate electrode of a bootstrap transistor. When the start signal is input, a potential is supplied to the gate electrode of the transistor through the switch, and the transistor is turned off. The transistor is turned off, so that leakage of a charge from the gate electrode of the bootstrap transistor can be prevented. Accordingly, time for storing a charge in the gate electrode of the bootstrap transistor can be shortened, and high-speed operation can be performed.
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公开(公告)号:US11307687B2
公开(公告)日:2022-04-19
申请号:US16720040
申请日:2019-12-19
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Kei Takahashi , Hiroyuki Miyake
IPC: G06F3/041 , G09G3/3233
Abstract: A circuit which detects an output current from a pixel and an output current from an input device, and converts the output current into data is provided. The current detection circuit includes an integrator circuit, a comparator, a counter, and a latch. The integrator circuit integrates the potential of a first signal during a period determined by a second signal and outputting it as a third signal. The comparator compares the potential of the third signal with a first potential and outputting a fourth signal. The counter outputs the number of pulses included in a fifth signal as a sixth signal during a period determined by the fourth signal. The latch holds the sixth signal. The integrator circuit preferably further includes an operational amplifier and some capacitors. The first signal is supplied from a pixel included in a display device or an input portion included in an input device.
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公开(公告)号:US11107432B2
公开(公告)日:2021-08-31
申请号:US17073634
申请日:2020-10-19
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Seiko Amano , Hiroyuki Miyake
IPC: G09G3/32 , G09G3/36 , G11C19/28 , G06F3/038 , G09G3/3266 , G06F1/3234 , H01L27/12 , G09G5/00
Abstract: In a pulse output circuit in a shift register, a power source line which is connected to a transistor in an output portion connected to a pulse output circuit at the next stage is set to a low-potential drive voltage, and a power source line which is connected to a transistor in an output portion connected to a scan signal line is set to a variable potential drive voltage. The variable potential drive voltage is the low-potential drive voltage in a normal mode, and can be either a high-potential drive voltage or the low-potential drive voltage in a batch mode. In the batch mode, display scan signals can be output to a plurality of scan signal lines at the same timing in a batch.
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公开(公告)号:US11069747B2
公开(公告)日:2021-07-20
申请号:US16862787
申请日:2020-04-30
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake , Hisao Ikeda
Abstract: To provide a display device that is suitable for increasing in size, a display device in which display unevenness is suppressed, or a display device that can display an image along a curved surface. The display device includes a first display panel and a second display panel each including a pair of substrates. The first display panel and the second display panel each include a first region which can transmit visible light, a second region which can block visible light, and a third region which can perform display. The third region of the first display panel and the first region of the second display panel overlap each other. The third region of the first display panel and the second region of the second display panel do not overlap each other.
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88.
公开(公告)号:US10957237B2
公开(公告)日:2021-03-23
申请号:US15387190
申请日:2016-12-21
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Kei Takahashi , Hiroyuki Miyake
IPC: G09G3/20 , G09G3/36 , H01L29/786 , G02F1/1345 , G09G3/3258 , H01L27/12 , H03M1/66 , H03M1/76 , G02F1/1362 , H01L27/092
Abstract: A semiconductor device with lower power consumption or a display device including the semiconductor device is provided. A circuit to which an N-bit signal is input includes a first digital-to-analog converter circuit to which an upper M-bit signal is input, a second digital-to-analog converter circuit to which a lower (N−M)-bit signal is input, and an amplifier circuit. The amplifier circuit includes a first transistor and a second transistor. An output terminal of the first digital-to-analog converter circuit is electrically connected to a gate of the first transistor. An output terminal of the second digital-to-analog converter circuit is electrically connected to a substrate potential of the second transistor. One of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor. An output terminal of the amplifier circuit is electrically connected to a gate of the second transistor.
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公开(公告)号:US10852870B2
公开(公告)日:2020-12-01
申请号:US16594419
申请日:2019-10-07
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake
IPC: G06F3/041 , G02F1/1333 , G09G3/36
Abstract: Provided is a novel touch panel that is highly convenience or reliable, a novel data processor that is highly convenient or reliable, a novel touch panel, a novel data processor, or a novel semiconductor device. The touch panel includes a sensor element and a display element. The sensor element includes a first conductive film and a second conductive film. The display element includes a layer containing a liquid crystal material and a third conductive film which is provided so that an electric field controlling the alignment of the liquid crystal material contained in the layer can be applied between the first conductive film and the third conductive film.
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公开(公告)号:US10824028B2
公开(公告)日:2020-11-03
申请号:US16698426
申请日:2019-11-27
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake , Makoto Kaneyasu
IPC: H01L29/10 , H01L29/12 , G02F1/1343 , G09F9/30 , G09G3/36 , H01L29/786 , H01L27/12 , G02F1/1362 , G02F1/136 , G02F1/13357
Abstract: A display device in which parasitic capacitance between wirings can be reduced is provided. Furthermore, a display device in which display quality is improved is provided. Furthermore, a display device in which power consumption can be reduced is provided.The display device includes a signal line, a scan line, a first electrode, a second electrode, a third electrode, a first pixel electrode, a second pixel electrode, and a semiconductor film. The signal line intersects with the scan line, the first electrode is electrically connected to the signal line, the first electrode has a region overlapping with the scan line, the second electrode faces the first electrode, the third electrode faces the first electrode, the first pixel electrode is electrically connected to the second electrode, the second pixel electrode is electrically connected to the third electrode, the semiconductor film is in contact with the first electrode, the second electrode, and the third electrode, and the semiconductor film is provided between the scan line and the first electrode to the third electrode.
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