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公开(公告)号:US12100368B2
公开(公告)日:2024-09-24
申请号:US18370427
申请日:2023-09-20
发明人: Atsushi Umezaki , Hajime Kimura
IPC分类号: G09G3/36 , G02F1/133 , G02F1/1362 , G11C19/28 , H01L27/088 , H01L27/12 , H01L29/423 , H01L29/786
CPC分类号: G09G3/3677 , G02F1/13306 , G02F1/136286 , G09G3/3648 , G11C19/28 , G11C19/287 , H01L27/088 , H01L27/1225 , H01L27/124 , H01L29/42356 , H01L29/7869 , G09G2310/0286 , G09G2310/0289 , G09G2310/08
摘要: A transistor whose channel region includes an oxide semiconductor is used as a pull down transistor. The band gap of the oxide semiconductor is 2.0 eV or more, preferably 2.5 eV or more, more preferably 3.0 eV or more. Thus, hot carrier degradation in the transistor can be suppressed. Accordingly, the circuit size of the semiconductor device including the pull down transistor can be made small. Further, a gate of a pull up transistor is made to be in a floating state by switching of on/off of the transistor whose channel region includes an oxide semiconductor. Note that when the oxide semiconductor is highly purified, the off-state current of the transistor can be 1 aA/μm (1×10−18 A/μm) or less. Therefore, the drive capability of the semiconductor device can be improved.
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公开(公告)号:US12094884B2
公开(公告)日:2024-09-17
申请号:US18089708
申请日:2022-12-28
发明人: Shunpei Yamazaki , Kengo Akimoto , Atsushi Umezaki
IPC分类号: H01L27/13 , G02F1/1362 , H01L27/12 , H01L29/786 , H10K59/131
CPC分类号: H01L27/1225 , G02F1/13624 , H01L27/124 , H01L29/7869 , H10K59/131
摘要: With an increase in the definition of a display device, the number of pixels is increased, and thus the numbers of gate lines and signal lines are increased. Due to the increase in the numbers of gate lines and signal lines, it is difficult to mount an IC chip having a driver circuit for driving the gate and signal lines by bonding or the like, which causes an increase in manufacturing costs. A pixel portion and a driver circuit for driving the pixel portion are formed over one substrate. At least a part of the driver circuit is formed using an inverted staggered thin film transistor in which an oxide semiconductor is used. The driver circuit as well as the pixel portion is provided over the same substrate, whereby manufacturing costs are reduced.
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公开(公告)号:US12027532B2
公开(公告)日:2024-07-02
申请号:US18080096
申请日:2022-12-13
发明人: Atsushi Umezaki
IPC分类号: G11C19/00 , G02F1/1362 , G09G3/20 , G09G3/325 , G09G3/36 , G11C19/28 , H01L27/12 , H03K3/356 , H03K19/003 , H03K19/20 , G09G3/3258 , G09G3/3266
CPC分类号: H01L27/124 , G02F1/13624 , G09G3/20 , G09G3/325 , G09G3/3674 , G11C19/28 , G11C19/287 , H01L27/1214 , H03K3/356 , H03K3/356104 , H03K19/00369 , H03K19/20 , G09G3/3258 , G09G3/3266 , G09G3/3677 , G09G3/3696 , G09G2300/0408 , G09G2300/0809 , G09G2310/0286 , G09G2310/0289 , G09G2310/0297 , G09G2310/08 , G09G2330/021
摘要: An object is to provide a semiconductor device which can suppress characteristic deterioration in each transistor without destabilizing operation. In a non-selection period, a transistor is turned on at regular intervals, so that a power supply potential is supplied to an output terminal of a shift register circuit. A power supply potential is supplied to the output terminal of the shift register circuit through the transistor. Since the transistor is not always on in a non-selection period, a shift of the threshold voltage of the transistor is suppressed. In addition, a power supply potential is supplied to the output terminal of the shift register circuit through the transistor at regular intervals. Therefore, the shift register circuit can suppress noise which is generated in the output terminal.
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公开(公告)号:US11916150B2
公开(公告)日:2024-02-27
申请号:US17946116
申请日:2022-09-16
发明人: Atsushi Umezaki
IPC分类号: G09G3/20 , G09G3/36 , H01L29/786 , G11C19/28 , H01L21/477 , H01L27/12
CPC分类号: H01L29/7869 , G09G3/20 , G09G3/3648 , G11C19/28 , H01L21/477 , H01L27/127 , H01L27/1255 , G09G2300/04 , G09G2310/0275
摘要: One of the objects is to improve display quality by reduction in malfunctions of a circuit. In a driver circuit formed using a plurality of pulse output circuits having first to third transistors and first to fourth signal lines, a first clock signal is supplied to the first signal line; a preceding stage signal is supplied to the second signal line; a second clock signal is supplied to the third signal line; an output signal is output from the fourth signal line. Duty ratios of the first clock signal and the second clock signal are different from each other. A period during which the second clock signal is changed from an L-level signal to an H-level signal after the first clock signal is changed from an H-level signal to an L-level signal is longer than a period during which the preceding stage signal is changed from an L-level signal to an H-level signal.
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公开(公告)号:US11901377B2
公开(公告)日:2024-02-13
申请号:US18096045
申请日:2023-01-12
发明人: Atsushi Umezaki
IPC分类号: H01L27/12 , H01L29/786 , G09G3/14 , H03B1/00 , H03K3/00 , G09G3/32 , G09G3/36 , H03K17/687 , G11C19/00
CPC分类号: H01L27/1255 , G09G3/14 , G09G3/32 , G09G3/36 , G11C19/00 , H01L29/7869 , H03B1/00 , H03K3/00 , H03K17/6871 , G09G2300/0426 , G09G2310/0286 , G09G2330/021
摘要: Provided is a semiconductor device exemplified by an inverter circuit and a shift register circuit, which is characterized by a reduced number of transistors. The semiconductor device includes a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is electrically connected to a first wiring, and the other thereof is electrically connected to a second wiring. One of a source and a drain of the second transistor is electrically connected to the first wiring, a gate of the second transistor is electrically connected to a gate of the first transistor, and the other of the source and the drain of the second transistor is electrically connected to one electrode of the capacitor, while the other electrode of the capacitor is electrically connected to a third wiring. The first and second transistors have the same conductivity type.
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公开(公告)号:US11893950B2
公开(公告)日:2024-02-06
申请号:US18100108
申请日:2023-01-23
发明人: Atsushi Umezaki
CPC分类号: G09G3/3648 , G09G3/20 , G09G3/3677 , G09G2300/0426 , G09G2310/0267 , G09G2310/0286 , G09G2320/043 , G09G2352/00 , H03K17/04
摘要: It is an object to provide a display device which can favorably display a image without delayed or distorted signals. The display device includes a first gate driver and a second gate driver. The first gate driver and the second gate driver each include a plurality of flip flop circuits and a plurality of transfer signal generation circuits. Both the flip flop circuit and the transfer signal generation circuit are circuits which output a signal inputted to a first input terminal with a half clock cycle delay. In addition, an output terminal of the transfer signal generation circuit is directly connected to a first input terminal of the flip flop circuit in the next stage. Therefore, delay and distortion of the signal which is inputted from the transfer signal generation circuit to the flip flop circuit can be reduced.
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公开(公告)号:US11823754B2
公开(公告)日:2023-11-21
申请号:US18206702
申请日:2023-06-07
发明人: Atsushi Umezaki
IPC分类号: G11C19/18 , G09G3/3266 , G09G3/36 , H01L27/12 , H01L29/786
CPC分类号: G11C19/184 , G09G3/3266 , G09G3/3677 , H01L27/1225 , H01L29/7869 , G09G2300/0426 , G09G2310/0286 , G09G2340/0492
摘要: A semiconductor device or the like with a novel structure that can change the orientation of the display is provided. A semiconductor device or the like with a novel structure, in which a degradation in transistor characteristics can be suppressed, is provided. A semiconductor device or the like with a novel structure, in which operation speed can be increased, is provided. A semiconductor device or the like with a novel structure, in which a dielectric breakdown of a transistor can be suppressed, is provided. The semiconductor device or the like has a circuit configuration capable of switching between a first operation and a second operation by changing the potentials of wirings. By switching between these two operations, the scan direction is easily changed. The semiconductor device is configured to change the scan direction.
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公开(公告)号:US11783906B2
公开(公告)日:2023-10-10
申请号:US17849770
申请日:2022-06-27
发明人: Atsushi Umezaki
IPC分类号: G11C19/18 , G09G3/3266 , G09G3/36 , H01L29/786 , H01L27/12
CPC分类号: G11C19/184 , G09G3/3266 , G09G3/3677 , H01L27/1225 , H01L29/7869 , G09G2300/0426 , G09G2310/0286 , G09G2340/0492
摘要: A semiconductor device or the like with a novel structure that can change the orientation of the display is provided. A semiconductor device or the like with a novel structure, in which a degradation in transistor characteristics can be suppressed, is provided. A semiconductor device or the like with a novel structure, in which operation speed can be increased, is provided. A semiconductor device or the like with a novel structure, in which a dielectric breakdown of a transistor can be suppressed, is provided. The semiconductor device or the like has a circuit configuration capable of switching between a first operation and a second operation by changing the potentials of wirings. By switching between these two operations, the scan direction is easily changed. The semiconductor device is configured to change the scan direction.
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公开(公告)号:US11749685B2
公开(公告)日:2023-09-05
申请号:US17087801
申请日:2020-11-03
发明人: Atsushi Umezaki , Hajime Kimura
CPC分类号: H01L27/1225 , G09G3/20 , G09G3/3674 , G09G3/3677 , G11C19/28 , G11C19/287 , H01L27/124 , H01L29/7869 , G09G2310/0286
摘要: An object is to provide a semiconductor device with improved operation. The semiconductor device includes a first transistor, and a second transistor electrically connected to a gate of the first transistor. A first terminal of the first transistor is electrically connected to a first line. A second terminal of the first transistor is electrically connected to a second line. The gate of the first transistor is electrically connected to a first terminal or a second terminal of the second transistor.
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公开(公告)号:US11735133B2
公开(公告)日:2023-08-22
申请号:US17961062
申请日:2022-10-06
发明人: Atsushi Umezaki
IPC分类号: G09G3/36 , H01L23/528 , G02F1/1345 , G02F1/1362 , H01L29/786 , G11C19/28 , H01L27/12 , G02F1/136
CPC分类号: G09G3/3674 , G02F1/13454 , G02F1/136286 , G09G3/3677 , G11C19/28 , H01L23/528 , H01L29/786 , G02F1/13606 , G02F2201/124 , G09G3/3688 , G09G2300/0408 , G09G2300/0417 , G09G2310/0286 , H01L27/1214 , H01L29/7869 , H01L2924/0002 , H01L2924/0002 , H01L2924/00
摘要: A driver circuit includes first to third transistors, a first circuit, and a second circuit. In the first transistor, a first terminal is electrically connected to a second wiring, a second terminal is electrically connected to a first wiring, and a gate is electrically connected to the second circuit and a first terminal of the third transistor. In the second transistor, a first terminal is electrically connected to the first wiring, a second terminal is electrically connected to a sixth wiring, a gate is electrically connected to the first circuit and a gate of the third transistor. A second terminal of the third transistor is electrically connected to the sixth wiring. The first circuit is electrically connected to a third wiring, a fourth wiring, a fifth wiring, and the sixth wiring. The second circuit is electrically connected to the first wiring, the second wiring, and the sixth wiring.
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