公开(公告)号：US20150118836A1

公开(公告)日：2015-04-30

申请号：US14064722

申请日：2013-10-28

Applicant: United Microelectronics Corp.

Inventor： Ching-Ling Lin ,  Chih-Sen Huang ,  Jia-Rong Wu ,  Ching-Wen Hung ,  Po-Chao Tsao

IPC: H01L29/66 ,  H01L21/768

CPC classification number: H01L29/66545 ,  H01L21/28247 ,  H01L21/76834 ,  H01L21/76897 ,  H01L29/41791 ,  H01L29/66628 ,  H01L29/66795 ,  H01L29/7848

Abstract: A method of fabricating a semiconductor device is disclosed. Provided is a substrate having a dummy gate formed thereon, a spacer on a sidewall of the dummy gate and a first dielectric layer surrounding the spacer. The dummy gate is removed to form a gate trench. A gate dielectric layer and at least one work function layer is formed in the gate trench. The work function layer and the gate dielectric layer are pulled down, and a portion of the spacer is laterally removed at the same time to widen a top portion of the gate trench. A low-resistivity metal layer is formed in a bottom portion of the gate trench. A hard mask layer is formed in the widened top portion of the gate trench.

Abstract translation: 公开了制造半导体器件的方法。 提供了一种其上形成有虚拟栅极的基板，在虚拟栅极的侧壁上的间隔物和围绕间隔物的第一介电层。 去除伪栅极以形成栅极沟槽。 栅极介电层和至少一个功函数层形成在栅极沟槽中。 功函数层和栅介质层被下拉，并且间隔件的一部分同时被横向去除，以加宽栅沟槽的顶部。 在栅极沟槽的底部形成低电阻率金属层。 在栅沟槽的加宽的顶部形成有硬掩模层。

公开(公告)号：US20150118835A1

公开(公告)日：2015-04-30

申请号：US14062909

申请日：2013-10-25

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ching-Ling Lin ,  Chih-Sen Huang ,  Po-Chao Tsao ,  Ching-Wen Hung ,  Jia-Rong Wu ,  Chien-Ting Lin

IPC: H01L21/768 ,  H01L29/66

CPC classification number: H01L29/66477 ,  H01L21/28247 ,  H01L21/76834 ,  H01L21/76897 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/7848

Abstract: A method for manufacturing a semiconductor device includes following steps. A substrate having at least a transistor embedded in an insulating material formed thereon is provided. The transistor includes a metal gate. Next, an etching process is performed to remove a portion of the metal gate to form a recess and to remove a portion of the insulating material to form a tapered part. After forming the recess and the tapered part of the insulating material, a hard mask layer is formed on the substrate to fill up the recess. Subsequently, the hard mask layer is planarized.

Abstract translation: 一种制造半导体器件的方法包括以下步骤。 提供了至少具有嵌入在其上形成绝缘材料的晶体管的衬底。 晶体管包括金属栅极。 接下来，进行蚀刻处理以去除金属栅极的一部分以形成凹部并且去除绝缘材料的一部分以形成锥形部分。 在形成凹部和绝缘材料的锥形部分之后，在基板上形成硬掩模层以填充凹部。 随后，硬掩模层被平坦化。