公开(公告)号：US20130244954A1

公开(公告)日：2013-09-19

申请号：US13816484

申请日：2011-08-08

申请人： Wei Han ,  Yan Yu ,  Guoyong Hu

发明人： Wei Han ,  Yan Yu ,  Guoyong Hu

IPC分类号： A61K38/17

CPC分类号： A61K38/17 ,  A61K38/1709

摘要： The invention is in the field of biotechnology. Specifically it describes the application and pharmaceutical composition of Reg4. The invention describes the applications of the protein as following in (a) or (b) in preparing drugs for treating acute pancreatitis: (a) the protein whose amino acid sequence is shown as SEQ ID NO. 1, or bioactive fragments, or analogs; (b) the proteins whose amino acid sequence have at least 70% homology comparing with amino acid sequence described in (a) and have activity for treating acute pancreatitis. The protein described in this invention treats acute pancreatitis effectively and may provide new therapy for treating acute pancreatitis clinically.

摘要翻译： 本发明在生物技术领域。 具体描述了Reg4的应用和药物组成。 本发明描述了（a）或（b）中蛋白质在制备用于治疗急性胰腺炎的药物中的应用：（a）其氨基酸序列显示为SEQ ID NO： 1或生物活性片段或类似物; （b）氨基酸序列与（a）中所述的氨基酸序列相比具有至少70％同源性且具有治疗急性胰腺炎的活性的蛋白质。 本发明描述的蛋白质有效治疗急性胰腺炎，并可临床治疗急性胰腺炎的新疗法。

公开(公告)号：US20130055015A1

公开(公告)日：2013-02-28

申请号：US13570722

申请日：2012-08-09

申请人： Yonglin GUI ,  Wei Han ,  Guangze Zhu ,  Changliang Wang

发明人： Yonglin GUI ,  Wei Han ,  Guangze Zhu ,  Changliang Wang

IPC分类号： G06F11/14

CPC分类号： G06F11/0793 ,  G06F11/0745 ,  G06F11/1443

摘要： An embodiment of the present invention provides a method for repairing a communication abnormality between a data card and a host. when an abnormality occurs on communication between a data card and a host, executing repair data in the data card to repair the operating system of the host; resetting the data card and reporting an optical disk descriptor; and detecting, by the data card, the type of the operating system of the host according to a received minicomputer system interface command. According to the embodiments of the present invention, in a process of communication between the data card and the host, when an abnormality occurs on the communication between the data card and the host and therefore the data card can no longer be used, the abnormality is able to be automatically repaired, thereby greatly improving repair efficiency and reducing a repair duration and repair complexity.

摘要翻译： 本发明的实施例提供一种用于修复数据卡和主机之间的通信异常的方法。 当在数据卡和主机之间的通信中发生异常时，执行数据卡中的修复数据来修复主机的操作系统; 复位数据卡并报告光盘描述符; 以及根据接收到的小型计算机系统接口命令，通过数据卡检测主机的操作系统的类型。 根据本发明的实施例，在数据卡与主机之间的通信过程中，当数据卡与主机之间的通信发生异常，因此不能再使用数据卡时，异常是 能够自动修复，从而大大提高修复效率，缩短维修时间和修复复杂性。

公开(公告)号：US08368424B1

公开(公告)日：2013-02-05

申请号：US13038259

申请日：2011-03-01

申请人： Wei Han ,  Zheng Chen ,  Warren Juenemann ,  Eric Lee

发明人： Wei Han ,  Zheng Chen ,  Warren Juenemann ,  Eric Lee

IPC分类号： H03K19/173

CPC分类号： H03K19/17772

摘要： In one embodiment, a programmable logic device such as an FPGA includes a programmable fabric adapted to operate normally and in a sleep mode, and a general purpose input/output port (I/O). The I/O port is adapted to function in conventional fashion during normal operation of the programmable fabric and as a wakeup control port during the sleep mode.

摘要翻译： 在一个实施例中，诸如FPGA的可编程逻辑器件包括适于正常和处于休眠模式的可编程结构以及通用输入/输出端口（I / O）。 I / O端口适于在可编程结构的正常操作期间以常规方式起作用，并且在睡眠模式期间用作唤醒控制端口。

公开(公告)号：US08319521B1

公开(公告)日：2012-11-27

申请号：US13076300

申请日：2011-03-30

申请人： Wei Han ,  Barry Britton ,  Eric Lee ,  Zheng Chen ,  Warren Juenemann ,  Mose Wahlstrom

发明人： Wei Han ,  Barry Britton ,  Eric Lee ,  Zheng Chen ,  Warren Juenemann ,  Mose Wahlstrom

IPC分类号： H03K19/177 ,  H01L25/00

CPC分类号： H03K19/17764 ,  H03K19/17768

摘要： A programmable logic device (PLD) is disclosed that includes a non-volatile memory; a shadow register; and a data shift register (DSR) configurable to receive control information from an external programming tool, wherein the DSR is configured to shift the control information into the shadow register if the PLD is in a first programming mode, the PLD being configurable to operate in the first programming mode using the control information stored in the shadow register without the control information being stored in the non-volatile memory.

摘要翻译： 公开了一种包括非易失性存储器的可编程逻辑器件（PLD）; 影子寄存器 以及数据移位寄存器（DSR），其被配置为从外部编程工具接收控制信息，其中所述DSR被配置为如果所述PLD处于第一编程模式，则将所述控制信息移位到所述影子寄存器中，所述PLD可配置为在 使用存储在影子寄存器中的控制信息的第一编程模式，而不将控制信息存储在非易失性存储器中。

公开(公告)号：US20110073368A1

公开(公告)日：2011-03-31

申请号：US12568847

申请日：2009-09-29

申请人： Wei Han ,  Jun Zhang ,  Paul Boonen

发明人： Wei Han ,  Jun Zhang ,  Paul Boonen

IPC分类号： E21B47/14 ,  G01V1/46

CPC分类号： E21B47/01 ,  G01V1/46

摘要： A downhole measurement tool includes at least one regular receiver and at least one reference receiver externally deployed on a tool body. The reference receiver is configured to be acoustically isolated from the borehole, for example, via an isolation structure including a high-impedance cap and a low-impedance gap. The reference receiver may be deployed in a linear array with the regular receiver(s) and may be substantially identical to the regular receiver(s) such that it has substantially the same sensitivity to tool mode signals and internal drilling noise as do the regular receivers. Received waveforms may be processed so as to remove tool mode arrivals and/or drilling noise.

摘要翻译： 井下测量工具包括至少一个常规接收器和外部部署在工具主体上的至少一个参考接收器。 参考接收器被配置为与钻孔隔声隔离，例如通过包括高阻抗帽和低阻抗间隙的隔离结构。 参考接收机可以部署在具有常规接收机的线性阵列中，并且可以与常规接收机基本相同，使得其具有与工作模式信号和内部钻孔噪声基本相同的灵敏度，如常规接收机 。 可以处理接收的波形，以便去除工具模式到达和/或钻孔噪声。

公开(公告)号：US07885953B2

公开(公告)日：2011-02-08

申请号：US11866907

申请日：2007-10-03

申请人： Ying-lin Chen ,  You-Chin Fuh ,  Wei Han ,  Fen-Ling Lin ,  Inderpal Singh Narang ,  Lin Qiao ,  Vijayshankar Raman ,  Kouhorng Allen Yang

发明人： Ying-lin Chen ,  You-Chin Fuh ,  Wei Han ,  Fen-Ling Lin ,  Inderpal Singh Narang ,  Lin Qiao ,  Vijayshankar Raman ,  Kouhorng Allen Yang

IPC分类号： G06F17/30 ,  G06F7/00

CPC分类号： G06F17/30498

摘要： A method, storage server, and computer readable medium for off-loading star-join operations from a host information processing system to a storage server. At least a first and second set of keys from a first and second dimension table, respectively are received from a host system. Each of the first and second set of keys is associated with at least one fact table. A set of locations associated with a set of foreign key indexes are received from the host system. A set of fact table indexes are traversed. At least a first set of Row Identifiers (“RIDs”) associated with the first set of keys and at least a second set of RIDs associated with the second set of keys are identified. An operation is performed on the first and second sets of RIDs to identify an intersecting set of RIDs. The intersecting set of RIDs are then stored.

摘要翻译： 一种用于从主机信息处理系统到存储服务器的卸载星形连接操作的方法，存储服务器和计算机可读介质。 分别从主机系统接收来自第一和第二维度表的至少第一和第二组密钥。 第一组和第二组中的每一个与至少一个事实表相关联。 从主机系统接收与一组外键索引相关联的一组位置。 遍历一组事实表索引。 识别与第一组密钥相关联的至少第一组行标识符（“RID”）和与第二组密钥相关联的至少第二组RID。 对第一和​​第二组RID执行操作以识别RID的交叉集合。 然后存储相交的RID集合。

公开(公告)号：US20100219803A1

公开(公告)日：2010-09-02

申请号：US12710860

申请日：2010-02-23

申请人： Wei Han ,  Ching-Ji Liang ,  Tao Liu

发明人： Wei Han ,  Ching-Ji Liang ,  Tao Liu

IPC分类号： G05F1/10

CPC分类号： H02M3/158

摘要： A DC to DC converter includes a control circuit, a gate driver circuit, and a power stage circuit. The control circuit receives and compares a DC output voltage. When the DC output voltage lower than a first threshold voltage, a PWM signal with a first frequency is outputted, and when the DC output voltage higher than the first threshold voltage, the PWM signal with a second frequency is outputted. The second frequency is higher than the first frequency. The gate driver circuit receives the PWM signal and converts the PWM signal to a first driving signal and a second driving signal. The power stage circuit converts a DC input voltage to the DC output voltage according to the first driving signal and the second driving signal.

摘要翻译： DC-DC转换器包括控制电路，栅极驱动电路和功率级电路。 控制电路接收并比较直流输出电压。 当DC输出电压低于第一阈值电压时，输出具有第一频率的PWM信号，并且当DC输出电压高于第一阈值电压时，输出具有第二频率的PWM信号。 第二频率高于第一频率。 栅极驱动电路接收PWM信号，并将PWM信号转换为第一驱动信号和第二驱动信号。 功率级电路根据第一驱动信号和第二驱动信号将DC输入电压转换为DC输出电压。

公开(公告)号：US07702100B2

公开(公告)日：2010-04-20

申请号：US11425273

申请日：2006-06-20

申请人： Wei Han ,  Yoshita Yerramilli

发明人： Wei Han ,  Yoshita Yerramilli

IPC分类号： H04L9/28 ,  H04L9/06

CPC分类号： H04L9/0631 ,  H04L2209/125

摘要： An apparatus for generating round-key words in accordance with a Rijndael algorithm. In one embodiment of the invention, the apparatus includes (a) a key expansion register block, having a key expansion register adapted to receive a final cipher key of a key expansion schedule in accordance with the Rijndael algorithm; (b) a round constant generator; (c) a first XOR adder adapted to add a first word of the key expansion register to a second word to generate and provide a first sum to the key expansion register block; (d) a transformation block adapted to generate a transformed word based on the first sum and the current round constant over four counts of a first cyclical counter; and (e) a second XOR adder adapted to add the transformed word to the first word of the key expansion register to generate and provide a second sum to the key expansion register block.

摘要翻译： 一种用于根据Rijndael算法生成圆键字的装置。 在本发明的一个实施例中，该装置包括（a）密钥扩展寄存器块，其具有密钥扩展寄存器，该密钥扩展寄存器适于根据Rijndael算法接收密钥扩展调度的最终密码密钥; （b）圆形恒定发电机; （c）第一XOR加法器，其适于将密钥扩展寄存器的第一字添加到第二字以产生并向密钥扩展寄存器块提供第一和; （d）适于根据第一周期计数器的四个计数基于第一和和当前循环常数生成变换字的变换块; 以及（e）第二XOR加法器，其适用于将所述变换的字添加到所述密钥扩展寄存器的第一个字，以产生并向所述密钥扩展寄存器块提供第二和。

公开(公告)号：US20100040603A1

公开(公告)日：2010-02-18

申请号：US12530579

申请日：2007-03-26

申请人： Wei Han ,  Huili Lu

发明人： Wei Han ,  Huili Lu

IPC分类号： A61K39/395 ,  A61K38/16 ,  A61K33/24 ,  A61K31/7105 ,  A61P35/00

CPC分类号： C07K14/522 ,  A61K31/282 ,  A61K31/351 ,  A61K31/498 ,  A61K38/00 ,  A61K38/193 ,  A61K2039/505 ,  C07K16/24 ,  A61K2300/00

摘要： CXCL9 promotes bone marrow regeneration, increases peripheral white blood cells, and increases survival if administered prior to treatment of a subject with chemotherapeutic drugs such as 5-FU or radiotherapy. Similar effects are obtained by administering an anti-CXCL9 antibody following chemotherapy or radiotherapy. Compositions and methods are presented for the treatment of cancer and bone marrow diseases.

摘要翻译： CXCL9促进骨髓再生，增加外周白细胞，并且如果在用化疗药物如5-FU或放疗治疗受试者之前施用，则增加存活率。 通过化疗或放疗后施用抗CXCL9抗体可以获得类似的效果。 提供了治疗癌症和骨髓疾病的组合物和方法。

公开(公告)号：US07630259B1

公开(公告)日：2009-12-08

申请号：US11959329

申请日：2007-12-18

申请人： Wei Han ,  Yoshita Yerramilli ,  Loren McLaury ,  Warren Juenemann

发明人： Wei Han ,  Yoshita Yerramilli ,  Loren McLaury ,  Warren Juenemann

IPC分类号： G11C29/00

CPC分类号： G11C29/08 ,  G01R31/318519 ,  G11C2029/0401

摘要： Various techniques are described to test memory arrays of a programmable logic device (PLD). In one example, a PLD includes a first memory array. The PLD also includes a plurality of sense amplifiers adapted to read a plurality of data values stored by the first memory array and provide a plurality of data signals corresponding to the data values. The PLD further includes a test circuit adapted to test the first memory array. The test circuit is coupled with the sense amplifiers and adapted to compare the data signals with a test signal to provide a pass/fail signal. In addition, the PLD includes a second memory array. The PLD also includes a data shift register adapted to test the second memory array.

摘要翻译： 描述了各种技术来测试可编程逻辑器件（PLD）的存储器阵列。 在一个示例中，PLD包括第一存储器阵列。 PLD还包括多个读出放大器，用于读取由第一存储器阵列存储的多个数据值，并提供对应于数据值的多个数据信号。 PLD还包括适于测试第一存储器阵列的测试电路。 测试电路与读出放大器耦合，并且适于将数据信号与测试信号进行比较以提供通过/失败信号。 此外，PLD包括第二存储器阵列。 PLD还包括适于测试第二存储器阵列的数据移位寄存器。