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公开(公告)号:US20210184649A1
公开(公告)日:2021-06-17
申请号:US16968738
申请日:2019-12-11
发明人: Yingqiang YAN , Chuan HU , Zhitao CHEN
摘要: A packaging method and package structure for a filter chip. The packaging method includes providing a circuit substrate, covering a first surface of the circuit substrate and/or filter chip with adhesive material and forming recessed cavities or closed cavities in the adhesive material. The method further includes adhering the filter chip to the first surface of circuit substrate via the adhesive material, such that surface acoustic wave transmitting regions of the filter chip correspond to the recessed cavities or closed cavities in the adhesive material to form a gap therebetween, and encapsulating the filter chip with encapsulating material. The method further includes forming interconnecting holes extending from a second surface of the circuit substrate to pins of the filter chip, filling the interconnecting holes with conductive material, so that the conductive material is in electrical contact with a chip pin bump or pad metal of the filter chip, and forming external pin pads on the second surface.
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公开(公告)号:US11784625B2
公开(公告)日:2023-10-10
申请号:US16968738
申请日:2019-12-11
发明人: Yingqiang Yan , Chuan Hu , Zhitao Chen
摘要: A packaging method and package structure for a filter chip. The packaging method includes providing a circuit substrate, covering a first surface of the circuit substrate and/or filter chip with adhesive material and forming recessed cavities or closed cavities in the adhesive material. The method further includes adhering the filter chip to the first surface of circuit substrate via the adhesive material, such that surface acoustic wave transmitting regions of the filter chip correspond to the recessed cavities or closed cavities in the adhesive material to form a gap therebetween, and encapsulating the filter chip with encapsulating material. The method further includes forming interconnecting holes extending from a second surface of the circuit substrate to pins of the filter chip, filling the interconnecting holes with conductive material, so that the conductive material is in electrical contact with a chip pin bump or pad metal of the filter chip, and forming external pin pads on the second surface.
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公开(公告)号:US20230253333A1
公开(公告)日:2023-08-10
申请号:US18015576
申请日:2020-07-27
发明人: Yingqiang YAN , Yao WANG , Chuan HU , Xun XIANG , Zhitao CHEN
IPC分类号: H01L23/538 , H01L23/00 , H01L25/065 , H01L21/48 , H01L25/00
CPC分类号: H01L23/5383 , H01L21/4857 , H01L24/16 , H01L24/32 , H01L24/73 , H01L25/50 , H01L25/0655 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204
摘要: Provided are a chip fine line fan-out package structure and a manufacturing method therefor. The chip fine line fan-out package structure provided and the chip fine line fan-out package structure manufactured using the manufacturing method each include an inter-chip fine winding layer and a package winding layer. The line width and line spacing of the inter-chip fine winding layer are less than the line width and line spacing of the package winding layer, and therefore, a user can choose to use different package winding layers according to actual needs. Therefore, the chip fine line fan-out package structure and the package structure manufactured using the manufacturing method can meet the use demands of users in more scenarios.
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