公开(公告)号：US06999504B1

公开(公告)日：2006-02-14

申请号：US09808760

申请日：2001-03-15

申请人： Daniel Amrany ,  Patrick Duvaut ,  William Keasler ,  Laurent Pierrugues

发明人： Daniel Amrany ,  Patrick Duvaut ,  William Keasler ,  Laurent Pierrugues

IPC分类号： H04B1/38 ,  H04L5/16

CPC分类号： H04L5/20

摘要： A method and apparatus are disclosed for reducing crosstalk in a telecommunication system. Broadly, the present invention utilizes a common mode signal to obtain additional information that can be used to better approximate the transmitted signal (by approximating and canceling crosstalk or otherwise). In accordance with one embodiment of the invention, a modem is provided having improved crosstalk cancellation circuitry for canceling crosstalk received on a local loop (or otherwise estimating the remotely transmitted signal) carrying modem communications. The modem includes a first input for receiving a signal carried on the local loop and a second input for receiving a signal obtained from the common mode. The modem further includes processing circuitry configured to either reduce crosstalk present in the signal carried on the local loop, or to otherwise closely approximate the remotely transmitted signal. Using both the first and second signals allows the processing circuitry of the modem to obtain more accurate results.

摘要翻译： 公开了一种用于减少电信系统中的串扰的方法和装置。 广义上，本发明利用共模信号来获得可用于更好地近似发送信号的附加信息（通过近似和消除串扰或以其他方式）。 根据本发明的一个实施例，提供了具有改进的串扰消除电路的调制解调器，用于消除承载调制解调器通信的本地环路（或另外估计远程发送的信号）上接收到的串扰。 调制解调器包括用于接收本地环路上承载的信号的第一输入端和用于接收从共模模式获得的信号的第二输入端。 调制解调器还包括处理电路，其被配置为减少存在于本地环路上携带的信号中的串扰，或者以其他方式紧密接近远程发送的信号。 使用第一和第二信号允许调制解调器的处理电路获得更准确的结果。

公开(公告)号：US06894580B2

公开(公告)日：2005-05-17

申请号：US09971484

申请日：2001-10-05

申请人： Brian Horng ,  Benedict A. Itri ,  Devin Ng ,  John Ross ,  James J. Zhao

发明人： Brian Horng ,  Benedict A. Itri ,  Devin Ng ,  John Ross ,  James J. Zhao

IPC分类号： C07C67/28 ,  C07C67/52 ,  H03H11/12 ,  H04B3/04

CPC分类号： H03H11/1291 ,  C07C67/28 ,  C07C67/52 ,  C07C69/33

摘要： A system and method for a filter tuner is presented. The system comprises a sequential logic, a register, a comparator, a first and second counter, a synchronizing logic, a first and second oscillator, a control logic, and a first and second combinational logic. The method comprises the steps of executing a calibration cycle of a filter tuner, executing a measurement cycle of the filter tuner, and tuning a filter with the filter tuner dependent on a determined cutoff frequency variation.

摘要翻译： 提出了一种滤波器调谐器的系统和方法。 该系统包括顺序逻辑，寄存器，比较器，第一和第二计数器，同步逻辑，第一和第二振荡器，控制逻辑以及第一和第二组合逻辑。 该方法包括以下步骤：执行滤波器调谐器的校准周期，执行滤波器调谐器的测量周期，以及根据确定的截止频率变化利用滤波器​​调谐器调谐滤波器。

公开(公告)号：US06856953B1

公开(公告)日：2005-02-15

申请号：US10021064

申请日：2001-12-19

申请人： Matthew Randmaa ,  Murali Anantha ,  David Lindsay ,  Keith Dillon

发明人： Matthew Randmaa ,  Murali Anantha ,  David Lindsay ,  Keith Dillon

IPC分类号： G06F11/00 ,  G10L11/00

CPC分类号： G06F11/3672

摘要： The present invention relates to an algorithm for ensuring compliancy of an algorithm module when integrated in a real time software system. The compliancy tests may include a memory test, interrupt test, latency test and other tests, as well as combinations thereof. An inventive aspect of the present invention relates to a unit test harness for verifying that a software algorithm module meets performance and functional requirements when integrated in a complete real-time software system. A software algorithm module eliminates or reduces unwanted behavior by the caller or other software on a real-time software system due to incorrect operations, which may involve interrupts, memory usage, register usage and/or other factors.

摘要翻译： 本发明涉及一种用于在集成在实时软件系统中时确保算法模块的符合性的算法。 兼容性测试可以包括记忆测试，中断测试，延迟测试和其他测试，以及其组合。 本发明的发明方面涉及用于在集成在完整的实时软件系统中时验证软件算法模块满足性能和功能需求的单元测试装置。 软件算法模块由于不正确的操作而消除或减少主叫方或其他软件在实时软件系统上的不必要的行为，这可能涉及中断，存储器使用，寄存器使用和/或其他因素。

公开(公告)号：US06851046B1

公开(公告)日：2005-02-01

申请号：US10011183

申请日：2001-11-13

申请人： Marc R. Delvaux ,  Mazhar Alidina

发明人： Marc R. Delvaux ,  Mazhar Alidina

IPC分类号： G06F9/32 ,  G06F9/40 ,  G06F9/42

CPC分类号： G06F9/30054 ,  G06F9/30061 ,  G06F9/4484

摘要： A system and method for performing a general ternary branch instruction is provided. Additionally, different approaches are provided for reducing the complexity of a ternary branch instruction word and corresponding hardware.

摘要翻译： 提供了一种用于执行一般三元分支指令的系统和方法。 另外，提供了不同的方法来降低三进制分支指令字和对应的硬件的复杂度。

公开(公告)号：US06967996B1

公开(公告)日：2005-11-22

申请号：US09732456

申请日：2000-12-06

申请人： Lujing Cai ,  Ehud Langberg ,  Shareq Rahman ,  William H. Scholtz

发明人： Lujing Cai ,  Ehud Langberg ,  Shareq Rahman ,  William H. Scholtz

IPC分类号： H04L5/14 ,  H04L5/16 ,  H04L27/26

CPC分类号： H04L5/1438 ,  H04L27/2608

摘要： An improved ADSL modem is presented. The ADSL modem in cooperation with a remote ADSL modem will exchange manufacturer identification information during initial DSL system training to establish a DSL communication link. The improved ADSL modem may comprise a memory device containing system parameters and operational algorithms previously determined to maximize DSL link performance between ADSL modems manufactured by different vendors. The improved ADSL modem is well suited for central office applications as it provides a solution for optimizing system performance that is transparent to remotely located ADSL modems. An ADSL modem in accordance with the present invention may comprise a digital signal processor and a memory device configured to store appropriate system parameters and operational algorithms that provide an optimized DSL communication link once applied during system initialization. The present invention also provides a method for optimizing DSL system performance. The method can be described by the following steps: supplying a default manufacturer identification for a remote modem at a master modem; applying appropriate system parameters and algorithms in response to the default manufacturer identification; initializing DSL system start-up training; receiving the actual manufacturer identification for the remote modem; determining if the current system parameters and algorithms are suitable for a DSL link with the actual manufacturer; adjusting training parameters and algorithms; restarting training when required; and establishing the DSL link.

摘要翻译： 提出了一种改进的ADSL调制解调器。 与远程ADSL调制解调器协作的ADSL调制解调器将在初始DSL系统训练期间交换制造商识别信息以建立DSL通信链路。 改进的ADSL调制解调器可以包括存储设备，该存储器设备包含先前确定的用于最大化由不同供应商制造的ADSL调制解调器之间的DSL链路性能的系统参数和操作算法。 改进的ADSL调制解调器非常适合中央办公室应用，因为它提供了一种解决方案，以优化对远程定位的ADSL调制解调器透明的系统性能。 根据本发明的ADSL调制解调器可以包括数字信号处理器和被配置为存储在系统初始化期间一旦应用的提供优化的DSL通信链路的适当系统参数和操作算法的存储器设备。 本发明还提供了一种优化DSL系统性能的方法。 该方法可以通过以下步骤来描述：在主调制解调器处提供远程调制解调器的默认制造商标识; 根据默认的制造商标识应用适当的系统参数和算法; 初始化DSL系统启动培训; 接收远程调制解调器的实际制造商标识; 确定当前的系统参数和算法是否适合于与实际制造商的DSL链路; 调整训练参数和算法; 需要时重新开始训练; 并建立DSL链路。

公开(公告)号：US20050013379A1

公开(公告)日：2005-01-20

申请号：US10874329

申请日：2004-06-24

申请人： Patrick Duvaut ,  Ehud Langberg ,  William Scholtz

发明人： Patrick Duvaut ,  Ehud Langberg ,  William Scholtz

IPC分类号： H04L27/26 ,  H04L27/00

CPC分类号： H04L1/0656 ,  H04L27/2602 ,  H04L27/2626 ,  H04L27/2647

摘要： A technique for improving multiple-channel multi-tone transmissions is disclosed. According to one particular embodiment, a method for transmitting data over at least two bonded channels is provided, wherein each of the at least two bonded channels comprises a plurality of tones. The method may comprise: transmitting a first symbol stream over a first tone in a first bonded channel and over a second tone in a second bonded channel, wherein the first tone is bonded to the second tone, and the transmissions over the first tone and the second tone are substantially in parallel; transmitting a second symbol stream over a third tone in the first bonded channel; and transmitting a third symbol stream over a fourth tone in the second bonded channel, wherein the third tone is bonded to the fourth tone, and the transmissions of the second symbol stream and the third symbol stream are substantially in parallel.

摘要翻译： 公开了一种用于改善多声道多音调传输的技术。 根据一个特定实施例，提供了一种用于在至少两个绑定信道上传输数据的方法，其中所述至少两个绑定信道中的每一个包括多个音调。 该方法可以包括：通过第一绑定信道中的第一音调和第二绑定信道中的第二音调发送第一符号流，其中第一音调被绑定到第二音调，并且通过第一音调和 第二音基本上是平行的; 在所述第一绑定信道中通过第三音调发送第二符号流; 以及在所述第二绑定信道中通过第四音调发送第三符号流，其中所述第三音调被绑定到所述第四音调，并且所述第二符号流和所述第三符号流的传输基本上是并行的。

公开(公告)号：US20040038654A1

公开(公告)日：2004-02-26

申请号：US10644023

申请日：2003-08-20

申请人： GlobespanVirata Inc.

发明人： Lujing Cai

IPC分类号： H04B001/00

CPC分类号： H04L1/006 ,  H04L1/0041 ,  H04L27/2602 ,  H04L27/3433

摘要： A method and apparatus for encoding data bits in DMT modulation system is providing utilizing a 64-state Trellis encoder to achieve further improvement in the achievable coding gain by employing coset partitioning, bit conversion, and constellation encoder that fit the DMT modulation. The coding gain of the new coder is around 5.63 dB, which is about 0.96 dB higher than the current Trellis coder in the DMT standard.

摘要翻译： 用于在DMT调制系统中对数据位进行编码的方法和装置提供利用64状态网格编码器，通过采用适合DMT调制的坐标分割，比特转换和星座编码器来实现可实现编码增益的进一步改进。 新编码器的编码增益约为5.63 dB，比DMT标准中的当前网格编码器高约0.96 dB。

公开(公告)号：US06952458B1

公开(公告)日：2005-10-04

申请号：US09969323

申请日：2001-10-02

申请人： Igor Djokovich ,  Patrick Duvaut ,  Massimo Sorbara

发明人： Igor Djokovich ,  Patrick Duvaut ,  Massimo Sorbara

IPC分类号： H03D1/00 ,  H04L27/38

CPC分类号： H04L27/38

摘要： A demapping system and method for demapping symbols into bits, is provided. An embodiment of the system comprises a processor, and a memory that is coupled to the processor. The memory comprises a memory module that comprises a program that finds a hard demapper output d based on a received symbol r; finds a challenger ci for each i, the challenger ci is a challenger of the hard demapper output d, i is an integer whose maximum value is a number of bits of the challenger ci; calculates reliability mi for each i, the reliability mi is the reliability of the hard demapper output d; and calculates soft bit xi for each i, the soft bit xi is calculated based on the reliability mi.

摘要翻译： 提供了用于将符号解映射成位的解映射系统和方法。 系统的一个实施例包括处理器和耦合到处理器的存储器。 存储器包括存储器模块，该存储器模块包括基于接收到的符号r找到硬解映射器输出d的程序; 为每个i找到挑战者c ，挑战者c是硬解映射器输出d的挑战者，i是一个整数，其最大值是 挑战者c 计算每个i的可靠性m i i i i，则可靠性m i是硬解映射器输出d的可靠性; 并且对于每个i计算软比特x i i i i，则基于可靠性m i i i来计算软比特x i i i。