摘要:
A method of starting a permanent magnet synchronous motor (PMSM) with field oriented control (FOC) includes: opening a first control loop of the PMSM; setting a first direction for a first current component of the PMSM; aligning a rotor of the PMSM to the first direction; after aligning the rotor, setting a second direction for the first current component, where the second direction is rotated from the first direction by 90 degrees; after setting the second direction, starting the rotor while the first control loop of the PMSM remains open; after starting the rotor, increasing a rotation speed of the rotor by operating the first control loop in a first closed-loop mode; and after increasing the rotation speed of the rotor, controlling the rotation speed of the rotor by operating the first control loop in a second closed-loop mode different from the first closed-loop mode.
摘要:
An electronic device described herein includes a touch screen for a touch sensitive display carried by a portable housing. The electronic device is configured to operate in a high. detection threshold mode to determine whether an object is in contact with the touch sensitive display, and operate in a low detection threshold mode to determine whether the object is adjacent to the touch sensitive display, based on lack of detection of the object being in contact with the touch sensitive display. The electronic device is further configured to determine whether the object is in contact with a peripheral edge of the portable housing by determining whether the object is adjacent opposite sides of the touch sensitive display, based on detection of the object being adjacent to the touch sensitive display.
摘要:
Embodiments of a processor architecture efficiently implement shadow registers in hardware. A register system in a processor includes a set of physical data registers coupled to register renaming logic. The register renaming logic stores data in and retrieves data from the set of physical registers when the processor is in a first processor state. The register renaming logic identifies ones of the set of physical registers that have a first operational state as a first group of registers and identifies the remaining ones of the set of physical registers as a second group of registers in response to an indication that the processor is to enter a second processor state from the first processor state. The register renaming logic stores data in and retrieves data from the second group of registers but not the first group of registers when the processor is in the second processor state.
摘要:
Embodiments of a processor architecture utilizing multi-bank implementation of physical register mapping table are provided. A register renaming system to correlate architectural registers to physical registers includes a physical register mapping table and a renaming logic. The physical register mapping table has a plurality of entries each indicative of a state of a respective physical register. The mapping table has a plurality of non-overlapping sections each of which having respective entries of the mapping table. The renaming logic is coupled to search a number of the sections of the mapping table in parallel to identify entries that indicate the respective physical registers have a first state. The renaming logic selectively correlates each of a plurality of architectural registers to a respective physical register identified as being in the first state. Methods of utilizing the multi-bank implementation of physical register mapping table are also provided.
摘要:
A technique for selecting instructions for execution from an issue queue at multiple function units while reducing the chances of instruction collisions. In an embodiment, each function unit in a processor may include a selection logic circuit that selects a specific instruction from the issue queue for execution. In order to avoid instruction collision, a function unit may have a selection logic circuit that may select two instructions from an instruction queue: one according to a first selection technique and one according to a second selection technique. Then, by comparing the instruction selected by the first selection technique to the instruction selected by the selection logic circuit of another function unit, the instruction selected by the second technique may be used instead if there will be an instruction collision because the instruction selected by the first selection technique is the same as the instruction selected at a different function unit.
摘要:
A comparison circuit can reduce the amount of power consumed when searching a load queue or a store queue of a microprocessor. Some embodiments of the comparison circuit use a comparison unit that performs an initial comparison of addresses using a subset of the address bits. If the initial comparison results in a match, a second comparison unit can be enabled to compare another subset of the address bits.
摘要:
A database stores updated information concerning protected communications services. A base station for a coexisting, and potentially co-channel, non-protected communications service makes an inquiry of the database requesting an identification of geographically relevant protected services along with the database stored information pertinent to each of those identified protected services. The returned information is processed by the base station to determine what channels are available for use by the non-protected service. An available channel is identified by the base station as the working channel for the non-protected service and the base station initiates a process to establish a communications network using the non-protected service and the selected working channel.
摘要:
A database stores updated information concerning protected communications services. A base station for a coexisting, and potentially co-channel, non-protected communications service makes an inquiry of the database requesting an identification of geographically relevant protected services along with the database stored information pertinent to each of those identified protected services. The returned information is processed by the base station to determine what channels are available for use by the non-protected service. An available channel is identified by the base station as the working channel for the non-protected service and the base station initiates a process to establish a communications network using the non-protected service and the selected working channel.
摘要:
A blind carrier frequency offset estimator is based on a single-OFDM-symbol training sequence in multi-user OFDMA uplink. Through multiple access interference modeling and analysis, a virtual user is employed that occupies the all null sub-carriers. By minimizing the energy leakage on the virtual user in term of tentative frequency offsets, the estimator can approach the real frequency offset. The estimator performs only on frequency-domain, simplifies interference calculations, and lowers the rank of the matrix. An iterative computation method is used to approach the real frequency offset.
摘要:
Embodiments of a processor architecture efficiently implement shadow registers in hardware. A register system in a processor includes a set of physical data registers coupled to register renaming logic. The register renaming logic stores data in and retrieves data from the set of physical registers when the processor is in a first processor state. The register renaming logic identifies ones of the set of physical registers that have a first operational state as a first group of registers and identifies the remaining ones of the set of physical registers as a second group of registers in response to an indication that the processor is to enter a second processor state from the first processor state. The register renaming logic stores data in and retrieves data from the second group of registers but not the first group of registers when the processor is in the second processor state.