公开(公告)号：US20220405232A1

公开(公告)日：2022-12-22

申请号：US17835746

申请日：2022-06-08

申请人： STMicroelectronis S.r.l.

发明人： Antonino Mondello ,  Salvatore Pisasale

IPC分类号： G06F15/78 ,  G06F15/173

摘要： In an embodiment a system on chip includes at least one master device, at least one slave device, a connection interface configured to route signals between the at least one master device and the at least one slave device, the connection interface configured to operate according to configuration parameters, and a configuration bus connected to the connection interface, wherein the configuration bus is configured to deliver new configuration parameters to the connection interface so as to adapt operation of the connection interface.

公开(公告)号：US07223024B2

公开(公告)日：2007-05-29

申请号：US11015363

申请日：2004-12-17

申请人： Antonio Fincato

发明人： Antonio Fincato

IPC分类号： G02B6/36

CPC分类号： G02B6/4214 ,  G02B6/4292

摘要： An optical module includes a support substrate, and an optoelectronic device on the support substrate. A coupling device provides optical coupling of the optoelectronic device with an optical fiber. The coupling device is integrated in the substrate, and is a reflection device inserted into an optical path between the optoelectronic device and the optical fiber.

摘要翻译： 光学模块包括支撑衬底和支撑衬底上的光电器件。 耦合装置提供光电子器件与光纤的光耦合。 耦合器件集成在衬底中，并且是插入到光电子器件和光纤之间的光路中的反射器件。

公开(公告)号：US20240204478A1

公开(公告)日：2024-06-20

申请号：US18533585

申请日：2023-12-08

申请人： STMicroelectronics (Rousset) SAS ,  STMicroelectronis S.r.l.

发明人： Romeo Letor ,  Alfio Russo ,  Nadia Lecci ,  Antonio Filippo Massimo Pizzardi ,  Antoine Pavlin ,  Vanni Poletto ,  Marco Brera ,  Simone Bianchi

IPC分类号： H01S5/026 ,  G01S7/481 ,  H01S5/02326 ,  H01S5/40

CPC分类号： H01S5/0261 ,  G01S7/4814 ,  H01S5/02326 ,  H01S5/4025

摘要： In a driver circuit couplable to laser diodes, a semiconductor body has a first surface. First and second control switches have drains coupled to a drain metallization, which is couplable to a power supply line, and sources coupled to respective first and second source metallizations, which are couplable to cathode terminals of the laser diodes and a reference node. A plurality of high-side switches have drains coupled to the drain metallization and sources coupled to third source metallizations, each of which is coupled to a respective drive output node for driving an anode terminal of a respective laser diode. The drain, first, second and third source metallizations face the first surface of the semiconductor body, which faces the laser diodes. The second and third source metallizations are aligned with one another and are superimposed to the respective source terminals of the second control switch and high-side switches.

公开(公告)号：US6111809A

公开(公告)日：2000-08-29

申请号：US324087

申请日：1999-06-01

申请人： Rino Micheloni ,  Giovanni Campardo

发明人： Rino Micheloni ,  Giovanni Campardo

IPC分类号： G11C8/10 ,  G11C8/00

CPC分类号： G11C8/10

摘要： A decoder comprises a first line placed at a first reference potential (V.sub.CC); a second line placed at a second reference potential switchable between the first reference potential and at least one programming potential higher than the first reference potential; a voltage elevator circuit connected to the second line, receiving a control signal and generating at an output a third reference potential switchable, on the basis of the control signal, between the first reference potential, the programming potential and a boosted potential which is between the first reference potential and the reference potential; a third line connected to the output of the voltage elevator circuit; an input circuit connected to the first line and receiving a predecoding signal, an output biasing circuit connected to said third line and generating a biasing signal for one line of the memory device; and switch circuit located between the input circuit and the biasing circuit, receiving a driving signal for selectively breaking the electrical connection between the input circuit and the biasing circuit on the basis of the driving signal.

摘要翻译： 解码器包括放置在第一参考电位（VCC）的第一线; 放置在可在第一参考电位和高于第一参考电位的至少一个编程电位之间切换的第二参考电位的第二行; 连接到第二线路的电压升降机电路，接收控制信号，并在输出端产生基于控制信号切换第三参考电位的第一参考电位，编程电位和在第二参考电位之间的升压电位 第一参考电位和参考电位; 连接到电压升降电路的输出的第三线; 连接到所述第一线并接收预解码信号的输入电路，连接到所述第三线并输出所述存储器件的一行的偏置信号的输出偏置电路; 以及位于输入电路和偏置电路之间的开关电路，基于驱动信号接收用于选择性地断开输入电路和偏置电路之间的电连接的驱动信号。