公开(公告)号：US20080025380A1

公开(公告)日：2008-01-31

申请号：US11800208

申请日：2007-05-04

申请人： Arya Reza Behzad ,  Mark Gonikberg ,  Ahmadreza (Raza) Rofougaran

发明人： Arya Reza Behzad ,  Mark Gonikberg ,  Ahmadreza (Raza) Rofougaran

IPC分类号： H04L25/00

CPC分类号： H04B15/02 ,  H04B15/06 ,  H04B2215/064 ,  H04B2215/068 ,  H04L27/0014 ,  Y02D70/122 ,  Y02D70/124

摘要： An integrated circuit (IC) includes a clock circuit, a processing module, and processing circuitry. The clock circuit is coupled to produce a digital clock signal. The processing module is coupled to determine whether a harmonic component of the digital clock signal having a nominal digital clock rate is within the frequency passband and to provide an indication to the clock circuit to adjust its rate from the nominal digital clock rate to an adjusted digital clock rate when the harmonic component of the digital clock signal is within the frequency passband. The processing circuitry is coupled to process, at the adjusted digital clock rate, the data to produce processed data having a rate corresponding to the nominal digital clock rate and to interpolate, at an interpolation rate, the processed data to produce interpolated processed data having a rate corresponding to the interpolation rate.

摘要翻译： 集成电路（IC）包括时钟电路，处理模块和处理电路。 时钟电路被耦合以产生数字时钟信号。 处理模块被耦合以确定具有标称数字时钟速率的数字时钟信号的谐波分量是否在频带内，并且向时钟电路提供指示以将其速率从标称数字时钟速率调整到调整数字 数字时钟信号的谐波分量在频带内的时钟频率。 处理电路被耦合以以调整的数字时钟速率处理数据以产生具有对应于标称数字时钟速率的速率的处理数据，并且以内插速率内插处理后的数据以产生经内插处理的数据，其具有 速率对应于插补率。