摘要:
A controller is provided for DC-DC converters of the type associated with a half-bridge driving stage of at least one inductive load, with a pair of power MOS transistors in Highside and Lowside configuration being driven by a corresponding converter. The controller includes an input for connection to a terminal of the inductive load. The controller also includes a read block for reading an inductive load phase current at the terminal, an over current comparator having a first input coupled to an output of the read block, and a bypass compensation network including an error amplifier block having a first input coupled to the terminal through a voltage divider, and a second input coupled to a reference potential. The compensation network has an output that is coupled to a second input of the over current comparator, and an output of the over current comparator is supplied to the DC-DC converter.
摘要:
A multiphase voltage regulator provides a voltage to an output terminal. The voltage regulator includes N parallel switches providing respective current phases that are added together to generate a total current for a general load coupled to the output terminal. The voltage regulator also includes N inductive circuits. Each inductive circuit is between an output node of a respective switch and the output terminal. A sense circuit adds the voltages in each of the output nodes of the N switches. An amplifier circuit has an input receiving the added voltage, and outputs a current proportional to the total current. A controller with two pins reads the total current. The two pins are connected to the inputs of the amplifier.
摘要:
A controller is provided for DC-DC converters of the type associated with a half-bridge driving stage of at least one inductive load, with a pair of power MOS transistors in Highside and Lowside configuration being driven by a corresponding converter. The controller includes an input for connection to a terminal of the inductive load. The controller also includes a read block for reading an inductive load phase current at the terminal, an over current comparator having a first input coupled to an output of the read block, and a bypass compensation network including an error amplifier block having a first input coupled to the terminal through a voltage divider, and a second input coupled to a reference potential. The compensation network has an output that is coupled to a second input of the over current comparator, and an output of the over current comparator is supplied to the DC-DC converter.
摘要:
The control circuit is for a current sharing bus integrated in signal regulator modules, particularly voltage regulator modules (VRM), the circuit being of the Average Program (AP) type. The circuit includes a voltage regulator module, including an operational transconductance amplifier, a first current generator, connected to a first input terminal of the operational transconductance amplifier, a second current generator connected to a second input of the operational transconductance amplifier. The operational transconductance amplifier is directly driven by currents Ii generated by the first current generator and second current generator.
摘要:
A method is provided for controlling a converter of the multiphase interleaving type. According to the method, there is detected when a change of the load applied to an output terminal of the converter occurs. All the phases of the converter are simultaneously turned off, and a driving interleaving phase shift is recovered so as to restart a normal operation of the converter. A controller for carrying out such a method is also provided.
摘要:
A DC-DC converter based switching voltage regulator circuit is for powering a microprocessor including regulated power supplies configured to produce different output voltages. The DC-DC converter has an output power stage configured to generate a regulated DC supply voltage and comprising a plurality of power transistors. A driver circuit is configured to drive the plurality of power transistors at an adjustable drive voltage in response to a drive control signal. Circuitry is configured to adaptively adjust the adjustable drive voltage and has a voltage selector configured to select between at least two different output voltages for the regulated power supplies of the microprocessor to be coupled to the driver circuit. The voltage selector is controlled by a state logic signal generated based upon logic signals generated by the microprocessor, the state logic signal indicating whether the microprocessor is entering a given power state.
摘要:
A method regulates the time constant matching of a DC/DC converter phase, further to a variation of a load applied to an output of said phase. Such phase being associated with a coil network, with a series RL circuit and a reading network 10, with a series RC circuit connected in parallel to the coil network. The method includes an acquisition step, suitable to acquire the trend of a voltage detected across the capacitance CD of the reading network 10, transforming it into a current trend, a detection step suitable to identify a variation above a certain threshold value of said current trend, an identification step, enabled by said detection step, suitable to determine a slope of said current trend and a regulation step suitable to adapt the value of said resistance RD based on said slope determined by said identification step.
摘要翻译:一种方法调节DC / DC转换器相位的时间常数匹配,进一步调整为施加到所述相位的输出的负载的变化。 这种相位与线圈网络相关联,具有串联RL电路和读取网络10,其中串联RC电路并联连接到线圈网络。 该方法包括采集步骤,适于获取在读取网络10的电容C D D上检测的电压的趋势,将其变换成当前趋势,适合于识别上述变化的检测步骤 所述当前趋势的某个阈值,由所述检测步骤启动的适合于确定所述当前趋势的斜率的识别步骤和适于基于所述电阻R D D的值适应的调节步骤 在由所述识别步骤确定的所述斜率上。
摘要:
A method for generating a reading signal of a sense element in at least a phase of a multiphase controller controlled by means of PWM control signals having a preset period and a duty cycle varying according to the load current and voltage of said controller, the reading signal being a digital signal having a first logic value during a reading period and a second logic value at the end of the reading period and showing a periodical trend which has a half cycle. The method provides that the value of said half cycle is so set that the reading period ends in a different instant from the switching instants of external power transistors comprised in the driving circuits of the controller phases not being read.
摘要:
A method is provided for controlling turn-on of phases of a multiphase regulator. According to the method, there are tested the conditions necessary for the turn-on of a phase to be turned-on indicated by a first cell of the phase register, and in response to a positive result a corresponding ramp signal is reset. There is then tested the conditions necessary for the turn-on of a phase successive to the phase to be turned on according to the list of priorities of the phase register, and corresponding ramp signals are reset if there is a positive result. In response to no positive results of testing conditions necessary for the turn-on of all phases successive to the phase to be turned on, there is reset a ramp signal corresponding to a phase successive to a last turned on phase indicated by a last cell of the phase register.
摘要:
An embodiment of method is described for controlling a voltage regulator of the type comprising at least one modulator of the PWM type, the method comprising: 1) generation of a control voltage signal for said PWM modulator; 2) frequency modulation of said control voltage signal obtaining a modulated control voltage signal having an harmonic at a switching frequency of said voltage regulator of reduced entity with respect to said control voltage signal; and 3) application of said modulated control voltage signal to said PWM modulator for generating a driving signal for said voltage regulator.