公开(公告)号：US07230877B1

公开(公告)日：2007-06-12

申请号：US09685361

申请日：2000-10-10

申请人： Andreas Rusch ,  Steffen Rothenhäusser ,  Alexander Truby ,  Yoichi Otani ,  Ulrich Zimmermann

发明人： Andreas Rusch ,  Steffen Rothenhäusser ,  Alexander Truby ,  Yoichi Otani ,  Ulrich Zimmermann

IPC分类号： H01L21/8234

CPC分类号： H01L27/112 ,  H01L21/822 ,  H01L27/101

摘要： A method for fabricating a semiconductor memory device is described. An insulating layer is disposed on a semiconductor substrate. A matrix of semiconductor memory elements is disposed in the substrate. The semiconductor memory elements include a plurality of contact holes formed in the insulating layer. One contact hole is formed in the insulating layer for each of the semiconductor memory elements. A bit definition region is disposed in the semiconductor substrate underneath each of the contact holes. A contact plug is disposed in each of the contact holes and is in electrical contact with the bit definition region. The bit definition region is configured such that a contact resistance between the semiconductor substrate and the contact plug defines a bit to be stored in the semiconductor memory elements, An evaluation circuit is connected to and evaluates the contact resistance of the semiconductor memory elements.

摘要翻译： 对半导体存储器件的制造方法进行说明。 绝缘层设置在半导体衬底上。 半导体存储元件的矩阵设置在基板中。 半导体存储元件包括形成在绝缘层中的多个接触孔。 对于每个半导体存储元件，在绝缘层中形成一个接触孔。 位于每个接触孔下面的半导体衬底中的位定义区域。 接触插头设置在每个接触孔中并且与位定义区域电接触。 位定义区域被配置为使得半导体衬底和接触插塞之间的接触电阻限定要存储在半导体存储器元件中的位。评估电路连接到并评估半导体存储器元件的接触电阻。