Self-aligned, silicided, trench-based DRAM/eDRAM processes with improved retention
    1.
    发明授权
    Self-aligned, silicided, trench-based DRAM/eDRAM processes with improved retention 失效
    自对准,硅化,基于沟槽的DRAM / eDRAM工艺,具有更好的保留性

    公开(公告)号:US07564086B2

    公开(公告)日:2009-07-21

    申请号:US11566360

    申请日:2006-12-04

    IPC分类号: H01L29/76

    CPC分类号: H01L27/10867 H01L27/10888

    摘要: A DRAM cell in a substrate has a deep trench (DT) extending from a surface of the substrate into the substrate, a word line (WL) formed on the surface of the substrate adjacent the deep trench, and oxide (TTO) disposed in a top portion of the trench and extending beyond the trench in the direction of the word line. In this manner, when silicided, there is oxide rather than silicon on the surface of the substrate in a gap between the word line (WL) and a passing word line (PWL) disposed above the deep trench.

    摘要翻译: 衬底中的DRAM单元具有从衬底的表面延伸到衬底中的深沟槽(DT),形成在与深沟槽相邻的衬底的表面上的字线(WL)和设置在衬底中的氧化物(TTO) 沟槽的顶部并且在字线的方向上延伸超过沟槽。 以这种方式,当硅化时,在位于深沟槽之上的字线(WL)和通过字线(PWL)之间的间隙中,衬底表面上存在氧化物而不是硅。