公开(公告)号：US08055956B2

公开(公告)日：2011-11-08

申请号：US11474121

申请日：2006-06-23

Applicant: Prashant Dubey ,  Amit Kashyap

Inventor： Prashant Dubey ,  Amit Kashyap

IPC: G11C29/00

CPC classification number: G11C29/802 ,  G11C29/4401 ,  G11C29/812

Abstract: The present invention provides a built-in self-repairable memory. The invention repairs a faulty IC through hard fuses, as well as through available redundancy in memories on chip. As the faults are not present in all the memories, the invention uses a lesser number of fuses to actually make a repair and thus results in a yield enhancement. The fuse data is stored in a compressed form and then decompressed as a restore happens at the power on. The fuse data interface with the memory to be repaired is serial. The serial links decreases the routing congestion and hence gain in area as well as gain in yield (due to lesser defects and reduced area).

Abstract translation: 本发明提供了一种内置的可自我修复的存储器。 本发明通过硬保险丝以及片上存储器中的可用冗余来修复故障IC。 由于故障不存在于所有存储器中，本发明使用较少数量的保险丝来实际进行修理，从而导致产量提高。 熔丝数据以压缩形式存储，然后在上电时恢复发生解压缩。 与要修复的存储器的保险丝数据接口是串行的。 串行链路减少路由拥塞，从而减少区域内的增益以及收益增益（由于较小的缺陷和减少的区域）。

公开(公告)号：US20070162793A1

公开(公告)日：2007-07-12

申请号：US11605833

申请日：2006-11-28

Applicant: Amit Kashyap ,  Prashant Dubey ,  Akhil Garg

Inventor： Amit Kashyap ,  Prashant Dubey ,  Akhil Garg

IPC: G11C29/00

CPC classification number: G11C29/48 ,  G11C29/14

Abstract: A method of sharing testing components for multiple embedded memories and the memory system incorporating the same. The memory system includes multiple test controllers, multiple interface devices, a main controller, and a serial interface. The main controller is used for initializing testing of each of the dissimilar memory groups using a serial interface and local test controllers. The memory system results in reduced routing congestion and faster testing of plurality of dissimilar memories.

Abstract translation: 一种共享用于多个嵌入式存储器的测试组件的方法以及包含其的存储器系统。 存储系统包括多个测试控制器，多个接口设备，主控制器和串行接口。 主控制器用于使用串行接口和本地测试控制器初始化每个不同内存组的测试。 存储器系统导致路由拥塞减少和多个不同存储器的更快测试。

公开(公告)号：US07954017B2

公开(公告)日：2011-05-31

申请号：US11605833

申请日：2006-11-28

Applicant: Amit Kashyap ,  Prashant Dubey ,  Akhil Garg

Inventor： Amit Kashyap ,  Prashant Dubey ,  Akhil Garg

IPC: G11C29/00 ,  G01R31/28

CPC classification number: G11C29/48 ,  G11C29/14

Abstract: A method of sharing testing components for multiple embedded memories and the memory system incorporating the same. The memory system includes multiple test controllers, multiple interface devices, a main controller, and a serial interface. The main controller is used for initializing testing of each of the dissimilar memory groups using a serial interface and local test controllers. The memory system results in reduced routing congestion and faster testing of plurality of dissimilar memories.

Abstract translation: 一种共享用于多个嵌入式存储器的测试组件的方法以及包含其的存储器系统。 存储系统包括多个测试控制器，多个接口设备，主控制器和串行接口。 主控制器用于使用串行接口和本地测试控制器初始化每个不同内存组的测试。 存储器系统导致路由拥塞减少和多个不同存储器的更快测试。

公开(公告)号：US20070061653A1

公开(公告)日：2007-03-15

申请号：US11474121

申请日：2006-06-23

Applicant: Prashant Dubey ,  Amit Kashyap

Inventor： Prashant Dubey ,  Amit Kashyap

IPC: G01R31/28

CPC classification number: G11C29/802 ,  G11C29/4401 ,  G11C29/812

Abstract: The present invention provides a built-in self-repairable memory. The invention repairs a faulty IC through hard fuses, as well as through available redundancy in memories on chip. As the faults are not present in all the memories, the invention uses a lesser number of fuses to actually make a repair and thus results in a yield enhancement. The fuse data is stored in a compressed form and then decompressed as a restore happens at the power on. The fuse data interface with the memory to be repaired is serial. The serial links decreases the routing congestion and hence gain in area as well as gain in yield (due to lesser defects and reduced area)

Abstract translation: 本发明提供了一种内置的可自我修复的存储器。 本发明通过硬保险丝以及片上存储器中的可用冗余来修复故障IC。 由于故障不存在于所有存储器中，本发明使用较少数量的保险丝来实际进行修理，从而导致产量提高。 熔丝数据以压缩形式存储，然后在上电时恢复发生解压缩。 与要修复的存储器的保险丝数据接口是串行的。 串行链路减少路由拥塞，从而减少区域内的增益以及产量增益（由于较小的缺陷和减少的区域）