摘要:
A modular solid-state mass data storage device providing high-density, high-capacity storage of data employs a modular pipeline architecture in which a distributed array of controller/memory modules is arranged in parallel controller/memory channels on one or more controller/memory cards, each controller/memory channel having first and last controller/memory modules. The modular storage device also includes a data format module, and first and second busses connecting outputs of the data format module to inputs of each of the first and last controller/memory modules. The first bus also connects outputs of the last controller/memory module in each channel back to an input of the data format modules. The modular pipeline architecture allows the number of controller/memory modules in each channel to be easily configured to accommodate any required storage size, while the number of controller/memory channels can be configured to accommodate any required storage size and transfer rate, without increasing latency time. The modular pipeline architecture also greatly simplifies the complexity of the memory controllers, and high-density packaging of the controller/memory modules provides compact storage for large amounts of data. The mass data storage device may be used as a random access memory (RAM) disk or for any other application requiring high-density, high-capacity mass data storage devices.
摘要:
A flight data recorder for reliable, high-speed storage of flight data employs a distributed, modular architecture in which an array of controller/memory modules is arranged in parallel controller/memory chains and the memory in the individual controller/memory modules is partitioned into submodules. This distributed architecture allows failed controller/memory modules or failed memory submodules to be bypassed, thus providing fault tolerances for both controller and memory functions. The modular architecture allows the number of controller/memory modules to be easily configured to accommodate any required storage size, while the number of parallel controller/memory chains can be configured to accommodate any required data rate.
摘要:
A non-blocking switching architecture having a fabric that is capable of switching on two levels by formatting signals crossing the switching fabric as “microcells” having a predetermined format. The microcells are routed by the switching fabric from an ingress line card to destination devices that can include egress line cards and/or processing resources. The processing resources can reformat the signals carried by the microcells to a second format. The reformatted signals can then be packaged as microcells and routed to a selected processing resource to provide switching in the second format. The processing resources transform the switched signals in the second format to a signal in the original format, which is carried by the switching fabric as microcells to an egress line card.
摘要:
A modular solid-state mass data storage device providing high-density, high capacity storage of numerous full-length movies for video server applications. The mass data storage device employs a modular pipeline architecture in which a distributed array of controller/memory modules is arranged in parallel controller/memory channels on one or more controller/memory cards. The modular pipeline architecture, in which each controller/memory channel has multiple controller/memory modules connected in a serial chain by address, data and control buses, allows the number of controller/memory modules in each channel and the number of controller/memory channels to be selected to accommodate a desired storage size and transfer rate, without an undesirably high latency time. An asynchronous transfer mode (ATM) switch allows multiple viewers to access the movies stored in the mass data storage device with independent video cassette recorder (VCR)-like control of the movie being watched. In a disclosed embodiment, the controller/memory modules in each channel are connected to first and second buses which extend from a data format module, the first bus also extending from the last controller/memory modules in each channel back to the data format module. The data format module provides data formatting, synchronization and error correction for the stored movies. In the disclosed embodiment, each controller/memory module includes an array of dynamic random access memory (DRAM) chips, and multiple controller/memory modules are packaged in standard memory module packages, such as single in-line memory module (SIMM) packages.