公开(公告)号：US20120275543A1

公开(公告)日：2012-11-01

申请号：US13541348

申请日：2012-07-03

申请人： Bradley John Morris ,  Arthur Thomas Gerald Fuller

发明人： Bradley John Morris ,  Arthur Thomas Gerald Fuller

IPC分类号： H04L25/49

CPC分类号： H04L25/49 ,  H04L27/2624

摘要： A communication system comprising signal processing circuitry and up-conversion circuitry. The signal processing circuitry is configured to: i) generate a first signal of a first modulation type and a second signal of a second modulation type; ii) combine the first and second signals to form a combined input signal; iii) generate peak reduction distortion based on the combined input signal; iv) select a portion of the peak reduction distortion that corresponds to a first frequency band; and v) apply the selected portion of the peak reduction distortion in the first frequency band of the combined input signal to provide a combined output signal. The up-conversion circuitry up-converts the combined output signal to an RF signal for transmission.

摘要翻译： 一种包括信号处理电路和上转换电路的通信系统。 信号处理电路被配置为：i）产生第一调制类型的第一信号和第二调制类型的第二信号; ii）组合第一和第二信号以形成组合的输入信号; iii）基于组合的输入信号产生峰值减小失真; iv）选择对应于第一频带的峰值减小失真的一部分; 以及v）将组合输入信号的第一频带中的峰值减小失真的选定部分应用于组合输出信号。 上变频电路将组合输出信号上变频为RF信号进行传输。

公开(公告)号：US07095278B2

公开(公告)日：2006-08-22

申请号：US10900300

申请日：2004-07-28

申请人： Arthur Thomas Gerald Fuller ,  Bradley John Morris

发明人： Arthur Thomas Gerald Fuller ,  Bradley John Morris

IPC分类号： H03F1/26

CPC分类号： H03F1/0211 ,  H03F1/3258 ,  H03F2200/102

摘要： A device, system, and method are provided for a power amplifier arrangement. In embodiments of a Vdd modulated power amplifier arrangement, a memory correction block includes a Vdd predictor for predicting waveform distortions of a Vdd modulated power supply and a main-path corrector for pre-distorting the input to the power amplifier arrangement as a function of the input to the power amplifier arrangement, an input envelope signal determined as a function of the input to the power amplifier arrangement, and an output of the Vdd predictor. Embodiments of the invention provide for operating power amplifier arrangements having memory. In some embodiments, methods of training the Vdd predictor and the main-path corrector of the memory correction block are provided.

摘要翻译： 提供了用于功率放大器装置的装置，系统和方法。 在Vdd调制功率放大器装置的实施例中，存储器校正块包括用于预测Vdd调制电源的波形失真的Vdd预测器和用于将功率放大器装置的输入预失真的主路径校正器作为 输入到功率放大器装置，确定为功率放大器装置的输入的函数的输入包络信号以及Vdd预测器的输出。 本发明的实施例提供具有存储器的操作功率放大器装置。 在一些实施例中，提供训练存储器校正块的Vdd预测器和主路径校正器的方法。

公开(公告)号：US06987953B2

公开(公告)日：2006-01-17

申请号：US10403727

申请日：2003-03-31

申请人： Bradley John Morris ,  Arthur Thomas Gerald Fuller

发明人： Bradley John Morris ,  Arthur Thomas Gerald Fuller

IPC分类号： H04B1/02 ,  H04B1/04

CPC分类号： H04B1/0483

摘要： A transmitter and method is provided for digitally upconverting a baseband digital signal to a modulated intermediate frequency (IF) digital signal and sigma-delta modulating the IF digital signal. The baseband digital signal is split into N phases, as can be accomplished using a polyphase interpolation technique (polyphase filter), and modulated. The modulated N phases are not recombined and each phase is further modulated, as can be accomplished using a digital-to-digital sigma-delta modulator that generates digital output signals at the same rate. A high speed digital multiplexer multiplexes the digital output signals into a single bit stream at a higher rate for subsequent power amplification and RF transmission.

摘要翻译： 提供了一种发射机和方法，用于将基带数字信号数字上变频到调制中频（IF）数字信号和Σ-Δ调制IF数字信号。 基带数字信号被分为N个阶段，可以使用多相插值技术（多相滤波器）实现并进行调制。 调制的N相不被重新组合，并且每个相位被进一步调制，这可以使用以相同速率产生数字输出信号的数字 - 数字Σ-Δ调制器来实现。 高速数字多路复用器以更高的速率将数字输出信号复用为单个比特流，用于随后的功率放大和RF传输。

公开(公告)号：US08670502B2

公开(公告)日：2014-03-11

申请号：US13620743

申请日：2012-09-15

申请人： Bradley John Morris ,  Arthur Thomas Gerald Fuller

发明人： Bradley John Morris ,  Arthur Thomas Gerald Fuller

IPC分类号： H04K1/02

CPC分类号： H04L25/49 ,  H04L27/2624

摘要： A communication system comprising signal processing circuitry and up-conversion circuitry. The signal processing circuitry is configured to: i) generate a first signal of a first modulation type and a second signal of a second modulation type; ii) combine the first and second signals to form a combined input signal; iii) generate peak reduction distortion based on the combined input signal; iv) select a portion of the peak reduction distortion that corresponds to a first frequency band; and v) apply the selected portion of the peak reduction distortion in the first frequency band of the combined input signal to provide a combined output signal. The up-conversion circuitry up-converts the combined output signal to an RF signal for transmission.

摘要翻译： 一种包括信号处理电路和上转换电路的通信系统。 信号处理电路被配置为：i）产生第一调制类型的第一信号和第二调制类型的第二信号; ii）组合第一和第二信号以形成组合的输入信号; iii）基于组合的输入信号产生峰值减小失真; iv）选择对应于第一频带的峰值减小失真的一部分; 以及v）将组合输入信号的第一频带中的峰值减小失真的选定部分应用于组合输出信号。 上变频电路将组合输出信号上变频为RF信号进行传输。

公开(公告)号：US08605818B2

公开(公告)日：2013-12-10

申请号：US13541348

申请日：2012-07-03

申请人： Bradley John Morris ,  Arthur Thomas Gerald Fuller

发明人： Bradley John Morris ,  Arthur Thomas Gerald Fuller

IPC分类号： H04K1/02

CPC分类号： H04L25/49 ,  H04L27/2624

摘要： A communication system comprising signal processing circuitry and up-conversion circuitry. The signal processing circuitry is configured to: i) generate a first signal of a first modulation type and a second signal of a second modulation type; ii) combine the first and second signals to form a combined input signal; iii) generate peak reduction distortion based on the combined input signal; iv) select a portion of the peak reduction distortion that corresponds to a first frequency band; and v) apply the selected portion of the peak reduction distortion in the first frequency band of the combined input signal to provide a combined output signal. The up-conversion circuitry up-converts the combined output signal to an RF signal for transmission.

摘要翻译： 一种包括信号处理电路和上转换电路的通信系统。 信号处理电路被配置为：i）产生第一调制类型的第一信号和第二调制类型的第二信号; ii）组合第一和第二信号以形成组合的输入信号; iii）基于组合的输入信号产生峰值减小失真; iv）选择对应于第一频带的峰值减小失真的一部分; 以及v）将组合输入信号的第一频带中的峰值减小失真的选择部分应用以提供组合输出信号。 上变频电路将组合输出信号上变频为RF信号进行传输。

公开(公告)号：US08406348B2

公开(公告)日：2013-03-26

申请号：US13550975

申请日：2012-07-17

申请人： Arthur Thomas Gerald Fuller ,  Bradley John Morris

发明人： Arthur Thomas Gerald Fuller ,  Bradley John Morris

IPC分类号： H04L27/06

CPC分类号： H04L27/0014

摘要： Systems and methods are disclosed that include selecting a sampling frequency and a tuning resolution frequency. These systems and methods may further include determining a wordlength of the phase accumulator, a numeric representation of the phase range, and a reduced representable value of a phase accumulator. In addition, these systems and methods may include operating the phase accumulator, where the phase accumulator creates an output phase accumulator signal. These systems and methods may further includes adjusting the angle of the output phase accumulator signal, where the output phase accumulator signal is adjusted based upon the operation of the phase accumulator, where adjusting the angle of the output phase accumulator signal creates an adjusted output phase accumulator signal and operating a CORDIC module, and where the CORDIC module performs operations upon the output phase accumulator signal based upon the parameters of the phase accumulator.

摘要翻译： 公开了包括选择采样频率和调谐分辨率频率的系统和方法。 这些系统和方法还可以包括确定相位累加器的字长，相位范围的数值表示以及相位累加器的可表示的值。 此外，这些系统和方法可以包括操作相位累加器，其中相位累加器产生输出相位累加器信号。 这些系统和方法还可以包括调整输出相位累加器信号的角度，其中基于相位累加器的操作来调节输出相位累加器信号，其中调节输出相位累加器信号的角度产生调整的输出相位累加器 信号和操作CORDIC模块，并且其中CORDIC模块基于相位累加器的参数在输出相位累加器信号上执行操作。

公开(公告)号：US08391809B1

公开(公告)日：2013-03-05

申请号：US13272796

申请日：2011-10-13

申请人： Arthur Thomas Gerald Fuller

发明人： Arthur Thomas Gerald Fuller

IPC分类号： H04B1/04 ,  H04B1/38

CPC分类号： H04B1/0475 ,  H03F1/3241 ,  H04B2001/0425

摘要： In an embodiment, a system for multi-band predistortion has a predistortion actuator applying a first and a further adjustable distortion to a first band input and at least one further band input, respectively, based on the first band input and at the least one further band input to provide a first band output and a second band output, respectively. The predistortion actuator drives an output port configured to be coupled to an amplifier. The system further has a processor coupled to an evaluation input, which is couplable to an output of the amplifier. A coefficient calculation block is coupled to a processor output, the first band input, and the at least one further band input. The coefficient calculation block calculates first and the further adjustable distortion coefficients based on the first band input, the at least one further band input and the processor output.

摘要翻译： 在一个实施例中，用于多频带预失真的系统具有预失真致动器，该预失真致动器分别基于第一频带输入和至少一个进一步的第一频带输入端施加第一和另外可调整的失真到第一频带输入和至少一个另外的频带输入 分别提供第一频带输出和第二频带输出。 预失真致动器驱动被配置为耦合到放大器的输出端口。 该系统还具有耦合到评估输入的处理器，该评估输入可以耦合到放大器的输出端。 系数计算块耦合到处理器输出，第一频带输入和至少一个另外的频带输入。 所述系数计算块基于所述第一频带输入，所述至少一个其它频带输入和所述处理器输出，先计算所述另外可调整的失真系数。

公开(公告)号：US20130010894A1

公开(公告)日：2013-01-10

申请号：US13620743

申请日：2012-09-15

申请人： Bradley John Morris ,  Arthur Thomas Gerald Fuller

发明人： Bradley John Morris ,  Arthur Thomas Gerald Fuller

IPC分类号： H04L25/49

CPC分类号： H04L25/49 ,  H04L27/2624

摘要： A communication system comprising signal processing circuitry and up-conversion circuitry. The signal processing circuitry is configured to: i) generate a first signal of a first modulation type and a second signal of a second modulation type; ii) combine the first and second signals to form a combined input signal; iii) generate peak reduction distortion based on the combined input signal; iv) select a portion of the peak reduction distortion that corresponds to a first frequency band; and v) apply the selected portion of the peak reduction distortion in the first frequency band of the combined input signal to provide a combined output signal. The up-conversion circuitry up-converts the combined output signal to an RF signal for transmission.

摘要翻译： 一种包括信号处理电路和上转换电路的通信系统。 信号处理电路被配置为：i）产生第一调制类型的第一信号和第二调制类型的第二信号; ii）组合第一和第二信号以形成组合的输入信号; iii）基于组合的输入信号产生峰值减小失真; iv）选择对应于第一频带的峰值减小失真的一部分; 以及v）将组合输入信号的第一频带中的峰值减小失真的选定部分应用于组合输出信号。 上变频电路将组合输出信号上变频为RF信号进行传输。

公开(公告)号：US08238473B2

公开(公告)日：2012-08-07

申请号：US13291481

申请日：2011-11-08

申请人： Bradley John Morris ,  Arthur Thomas Gerald Fuller

发明人： Bradley John Morris ,  Arthur Thomas Gerald Fuller

IPC分类号： H04K1/02

CPC分类号： H04L25/49 ,  H04L27/2624

摘要： The present invention provides a technique for reducing the peak power of a combined signal that has a first signal of a first modulation type and a second signal of a second modulation type. Based on the combined signal, peak reduction distortion is determined. The peak reduction distortion is configured such that, if applied to the entirety of the combined signal, excessive peaks throughout the combined signal would be reduced. However, instead of applying the entirety of the peak reduction distortion, a selected portion of the peak reduction distortion is applied to a corresponding portion of the combined signal to reduce the peak power of the combined signal.

摘要翻译： 本发明提供一种用于降低具有第一调制类型的第一信号和第二调制类型的第二信号的组合信号的峰值功率的技术。 基于组合信号，确定峰值减小失真。 峰值降低失真被配置为使得如果应用于整个组合信号，则整个组合信号中的过多峰值将被减小。 然而，代替应用峰值降低失真的全部，代替峰值减小失真的选定部分被施加到组合信号的相应部分，以降低组合信号的峰值功率。

公开(公告)号：US07961045B2

公开(公告)日：2011-06-14

申请号：US12058027

申请日：2008-03-28

申请人： Bradley John Morris ,  Arthur Thomas Gerald Fuller

发明人： Bradley John Morris ,  Arthur Thomas Gerald Fuller

IPC分类号： H03F1/26

CPC分类号： H04L27/366 ,  H03F1/0288 ,  H03F1/3247 ,  H03F2200/321

摘要： A method of optimizing performance of a multiple path amplifier includes: splitting an input signal to derive a respective sub-signal for each branch of the multiple path amplifier; independently pre-distorting each sub-signal using a known performance characteristic of its associated branch of the multiple path amplifier; and supplying each pre-distorted sub-signal to its associated branch of the multiple amplifier.

摘要翻译： 一种优化多径放大器的性能的方法包括：分割输入信号以导出多路径放大器的每个分支的相应子信号; 使用其相关联的多路径放大器的分支的已知性能特征来独立地预失真每个子信号; 并将每个预失真的子信号提供给多放大器的相关分支。