公开(公告)号：US08198912B1

公开(公告)日：2012-06-12

申请号：US12979336

申请日：2010-12-28

申请人： Rajavelu Thinakaran ,  Ashwin Ramachandran

发明人： Rajavelu Thinakaran ,  Ashwin Ramachandran

IPC分类号： H03K17/16

CPC分类号： H03K19/018571 ,  H03K19/01707 ,  H03K19/018585 ,  H03K19/018592 ,  H04L25/03834

摘要： A voltage-mode driver circuit supporting pre-emphasis is implemented to include a driver arm and a correction arm. The driver arm receives an input signal, and is operable, in pre-emphasis intervals as well as steady-state intervals, to connect a first impedance between an output terminal of the driver circuit and a constant reference potential. The correction arm is operable to connect a correction impedance in parallel with the first impedance in pre-emphasis intervals, and to decouple the correction impedance from the first impedance in steady-state intervals. The parallel connection of the first impedance and the correction impedance in pre-emphasis intervals increases the voltage level of the output signal of the driver circuit in pre-emphasis intervals. The use of the correction arm compensates for the effect of parasitic capacitance at one or more nodes of the driver circuit, thereby reducing the settling time of the output signal and enabling high-speed operation.

摘要翻译： 实施支持预加重的电压模式驱动电路，以包括驱动器臂和校正臂。 驱动器臂接收输入信号，并且可在预加重间隔以及稳态间隔中操作，以连接驱动电路的输出端和恒定参考电位之间的第一阻抗。 校正臂可操作以在预加重间隔中与第一阻抗平行地连接校正阻抗，并且在稳态间隔中将校正阻抗与第一阻抗分离。 在预加重间隔中，第一阻抗和校正阻抗的并联连接以预加重间隔增加驱动器电路的输出信号的电压电平。 校正臂的使用补偿了驱动器电路的一个或多个节点处的寄生电容的影响，从而减小了输出信号的建立时间并实现了高速操作。

公开(公告)号：US20120161811A1

公开(公告)日：2012-06-28

申请号：US12979336

申请日：2010-12-28

申请人： Rajavelu Thinakaran ,  Ashwin Ramachandran

发明人： Rajavelu Thinakaran ,  Ashwin Ramachandran

IPC分类号： H03K19/003

CPC分类号： H03K19/018571 ,  H03K19/01707 ,  H03K19/018585 ,  H03K19/018592 ,  H04L25/03834

摘要： A voltage-mode driver circuit supporting pre-emphasis is implemented to include a driver arm and a correction arm. The driver arm receives an input signal, and is operable, in pre-emphasis intervals as well as steady-state intervals, to connect a first impedance between an output terminal of the driver circuit and a constant reference potential. The correction arm is operable to connect a correction impedance in parallel with the first impedance in pre-emphasis intervals, and to decouple the correction impedance from the first impedance in steady-state intervals. The parallel connection of the first impedance and the correction impedance in pre-emphasis intervals increases the voltage level of the output signal of the driver circuit in pre-emphasis intervals. The use of the correction arm compensates for the effect of parasitic capacitance at one or more nodes of the driver circuit, thereby reducing the settling time of the output signal and enabling high-speed operation.

摘要翻译： 实施支持预加重的电压模式驱动电路，以包括驱动器臂和校正臂。 驱动器臂接收输入信号，并且可在预加重间隔以及稳态间隔中操作，以连接驱动电路的输出端和恒定参考电位之间的第一阻抗。 校正臂可操作以在预加重间隔中与第一阻抗平行地连接校正阻抗，并且在稳态间隔中将校正阻抗与第一阻抗分离。 在预加重间隔中，第一阻抗和校正阻抗的并联连接以预加重间隔增加驱动器电路的输出信号的电压电平。 校正臂的使用补偿了驱动器电路的一个或多个节点处的寄生电容的影响，从而减小了输出信号的建立时间并实现了高速操作。

公开(公告)号：US06645857B1

公开(公告)日：2003-11-11

申请号：US10201010

申请日：2002-07-22

申请人： Bruce J. Whitefield ,  Ashwin Ramachandran

发明人： Bruce J. Whitefield ,  Ashwin Ramachandran

IPC分类号： H01L2144

CPC分类号： H01L21/76844 ,  H01L21/76802 ,  H01L21/7682 ,  H01L21/76831 ,  H01L21/76877

摘要： A method of forming an electrically conductive via that abuts a key hole formed in filler material. A void is etched through the filler material in which the key hole is formed, thereby forming a link between the void and the key hole. A liner is formed within the void, where the liner is formed to a thickness that is at least about half a minimum cross sectional dimension of the key hole, so as to plug the link between the void and the key hole and thereby trap any contaminants within the key hole. Electrically conductive via material is deposited within the void to form the via.

摘要翻译： 形成与填充材料形成的键孔抵接的导电孔的方法。 通过形成有键孔的填充材料蚀刻空隙，从而在空隙和键孔之间形成连接。 衬垫形成在空隙内，其中衬垫形成为至少约关键孔的最小横截面尺寸的大约一半的厚度，以便堵塞空隙和键孔之间的连接，从而捕获任何污染物 在钥匙孔内。 导电通孔材料沉积在空隙内以形成通孔。