摘要:
Device, system and method of verification of address translation mechanisms. For example, an apparatus for testing an address translation mechanism of a design-under-test, the apparatus including: a test generator to receive a specification of at least one address translation table, and to generate one or more constraint-satisfaction-problem projectors over a plurality of attributes of said address translation table.
摘要:
A system for commercially making and dispensing individual portions of freshly perpared frozen yogurt or ice cream comprising providing a battery of miniature batch type ice cream making machines having containers with capacities of up to 800 ml., refrigeration means for cooling the containers to desired temperatures for making frozen yogurt or ice cream, yogurt or ice cream mix, and flavor concentrates, whereby separate individual portions of freshly prepared frozen yogurt or ice cream can be prepared simultaneously for serving to a number of customers by introducing separate individual portions of frozen yogurt or ice cream mix and flavor concentrates into the containers, activating the ice cream making machines for the required time and scooping up the individual portions of frozen yogurt or ice cream for serving to customers.
摘要:
Generation of a test based on a test template comprising of branch instructions. The test template may be a layout test template, defining a set of possible control flows possibilities between template instructions in the layout test template. The test is generated by a test generator which may simulate a state of a target computerized system executing the test. The simulation may be performed during generation of the test. The test generator may further verify previously generated instructions. The test generator may further generate instructions associated with leftover template instructions.
摘要:
A computer-implemented method for verification of a hardware design includes specifying requests to allocate regions in a memory of the hardware design, such that at least two of the requests are specified independently of one another. The requests indicate respective allocation types.Overlap restrictions are specified between at least some of the allocation types. The requests and the overlap restrictions are automatically converted to a constraint satisfaction problem (CSP), which includes CSP constraints based on the requests, the allocation types and the overlap restrictions.The CSP is solved to produce a random test program, which includes a memory map that allocates the regions in the memory while complying with the requests and the overlap restrictions. The test program is applied to the hardware design.
摘要:
Device, system and method of verification of address translation mechanisms. For example, an apparatus for testing an address translation mechanism of a design-under-test, the apparatus including: a test generator to receive a specification of at least one address translation table, and to generate one or more constraint-satisfaction-problem projectors over a plurality of attributes of said address translation table.
摘要:
A computer-implemented method, an apparatus and a computer program for automatically extracting useful information for functional verification. The method comprising performing repeatedly both operating an instruction generator associated with a Design Under Test (DUT), whereby a generated instruction is determined, the generated instruction having one or more instruction attributes; and collecting information relating to the generated instruction. Based on the generated instruction and the collected information, a classification technique is utilized to classify the information based on the instruction attributes.
摘要:
Device, system and method of verification of address translation mechanisms. For example, an apparatus for testing an address translation mechanism of a design-under-test, the apparatus including: a test generator to receive a specification of at least one address translation table, and to generate one or more constraint-satisfaction-problem projectors over a plurality of attributes of said address translation table.
摘要:
a computer-implemented method, an apparatus and a computer program for automatically extracting useful information for functional verification. The method comprising performing repeatedly both operating an instruction generator associated with a Design Under Test (DUT), whereby a generated instruction is determined, the generated instruction having one or more instruction attributes; and collecting information relating to the generated instruction. Based on the generated instruction and the collected information, a classification technique is utilized to classify the information based on the instruction attributes.
摘要:
A computer-implemented method for verification of a hardware design includes specifying requests to allocate regions in a memory of the hardware design, such that at least two of the requests are specified independently of one another. The requests indicate respective allocation types.Overlap restrictions are specified between at least some of the allocation types. The requests and the overlap restrictions are automatically converted to a constraint satisfaction problem (CSP), which includes CSP constraints based on the requests, the allocation types and the overlap restrictions.The CSP is solved to produce a random test program, which includes a memory map that allocates the regions in the memory while complying with the requests and the overlap restrictions. The test program is applied to the hardware design.