摘要:
Provided are an apparatus and method for writing data to a phase-change random access memory (PRAM) by using writing power calculation and data inversion functions, and more particularly, an apparatus and method for writing data which can minimize power consumption by calculating the power consumed while input original data or inverted data is written to a PRAM and storing the data consuming less power. A PRAM consumes a significant amount of power in order to store data in a memory cell since a large electric current is required to flow for a long period of time. According to the present invention, since the PRAM consumes different amounts of power when writing data with a value of 0 and data with a value of 1, the power consumed when input original data is stored and the power consumed when the input original data is inverted and stored are compared to each other, the data with a smaller power consumption is stored when the data is written to the PRAM as a word unit, and thus the power consumption of the PRAM can be reduced.
摘要:
Provided are an apparatus and method for writing data to a phase-change random access memory (PRAM) by using writing power calculation and data inversion functions, and more particularly, an apparatus and method for writing data which can minimize power consumption by calculating the power consumed while input original data or inverted data is written to a PRAM and storing the data consuming less power. A PRAM consumes a significant amount of power in order to store data in a memory cell since a large electric current is required to flow for a long period of time. According to the present invention, since the PRAM consumes different amounts of power when writing data with a value of 0 and data with a value of 1, the power consumed when input original data is stored and the power consumed when the input original data is inverted and stored are compared to each other, the data with a smaller power consumption is stored when the data is written to the PRAM as a word unit, and thus the power consumption of the PRAM can be reduced.
摘要:
The present invention relates to a ROM division method for reducing the size of a ROM in a direct digital frequency synthesizer (DDFS), which is used to synthesize a frequency in a communication system requiring fast frequency conversion. A ROM consuming most energy in the system, a modified Nicholas architecture is brought forth to reduce the size of ROM. In this modified Nicholas architecture, a ROM is divided into coarse ROM and fine ROM to convert phase to sine value. The present invention divides the coarse ROM and the fine ROM into quantized ROM and error ROM respectively. Then, value stored in each ROM is segmented in certain intervals and the minimum quantized value in each of the section is stored in the quantized ROM, while the difference between the original ROM value and the quantized ROM value is stored in the error ROM. This way, the size of a ROM can be reduced. Phase value inputted in a DDFS, a sine value is calculated by adding the four ROM values, i.e., coarse-quantized ROM, coarse-error ROM, fine-quantized ROM and fine-error ROM.