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公开(公告)号:US08522041B2
公开(公告)日:2013-08-27
申请号:US09896255
申请日:2001-06-28
IPC分类号: H04L9/00
CPC分类号: G06F21/72
摘要: A system and method for efficiently performing a data encryption operation in an electronic system preferably includes a processor that may initially create an encryption structure in a memory device. The encryption structure may preferably include one or more command structures for performing data encryption or decryption operations. The processor may subsequently program local control registers of a DMA engine with selected encryption information in response to a data encryption or decryption requirement. The processor may then instruct the DMA engine to perform the required data encryption or decryption operation. Next, the DMA engine may responsively copy one or more of the command structures from the memory device into local command registers that are coupled to the DMA engine. The DMA engine may then reference the foregoing control registers and command registers to thereby efficiently perform one or more data encryption or decryption operations. During the data encryption or decryption operations, the DMA engine may preferably provide source data from the memory device to an encryption module for encrypting or decrypting. The DMA engine may then responsively store the encrypted or decrypted data back into the memory device as destination data that may be subsequently provided to any appropriate destination entity that is coupled to the electronic system.