公开(公告)号：US20050131665A1

公开(公告)日：2005-06-16

申请号：US11035275

申请日：2005-01-12

Applicant: Chian-Min Ho ,  Robert Mardjuki ,  David Dill ,  Jing Lin ,  Ping Yeung ,  Paul Estrada ,  Jean-Charles Giomi ,  Tai Ly ,  Kalyana Mulam ,  Lawrence Widdoes ,  Paul Wilcox

Inventor： Chian-Min Ho ,  Robert Mardjuki ,  David Dill ,  Jing Lin ,  Ping Yeung ,  Paul Estrada ,  Jean-Charles Giomi ,  Tai Ly ,  Kalyana Mulam ,  Lawrence Widdoes ,  Paul Wilcox

IPC: G01R31/3183 ,  G06F17/50

CPC classification number: G01R31/318307

Abstract: A programmed computer searches for functional defects in a description of a circuit undergoing functional verification in the following manner. The programmed computer simulates the functional behavior of the circuit in response to a test vector, automatically restores the state of the simulation without causing the simulation to pass through a reset state, and then simulates the functional behavior of the circuit in response to another test vector. A predetermined rule can be used to identify test vectors to be simulated, and the predetermined rule can depend upon a measure of functional verification, including the number of times during simulation when a first state transition is performed by a first-controller at the same time as a second state transition is performed by a second controller. During simulation of the test vectors, manually generated tests or automatically generated checkers can monitor portions of the circuit for defective behavior.

Abstract translation: 编程的计算机以以下方式搜索正在进行功能验证的电路的描述中的功能缺陷。 编程的计算机根据测试矢量模拟电路的功能行为，自动恢复模拟状态，而不会使模拟通过复位状态，然后响应于另一个测试矢量模拟电路的功能行为 。 可以使用预定规则来识别待仿真的测试向量，并且预定规则可以取决于功能验证的度量，包括在第一控制器同时执行第一状态转换时的模拟期间的次数 作为第二状态转移由第二控制器执行。 在模拟测试矢量期间，手动生成的测试或自动生成的检查器可以监视电路的部分故障行为。

公开(公告)号：US20050081169A1

公开(公告)日：2005-04-14

申请号：US11006238

申请日：2004-12-06

Applicant: Jeremy Levitt ,  Christophe Gauthron ,  Chian-Min Ho ,  Ping Yeung ,  Kalyana Mulam ,  Ramesh Sathianathan

Inventor： Jeremy Levitt ,  Christophe Gauthron ,  Chian-Min Ho ,  Ping Yeung ,  Kalyana Mulam ,  Ramesh Sathianathan

IPC: G06F7/60 ,  G06F9/45 ,  G06F17/10 ,  G06F17/50

CPC classification number: G06F17/5081 ,  G06F17/50 ,  G06F17/504

Abstract: The amount of analysis performed in determining the validity of a property of a digital circuit is measured concurrent with performance of the analysis, and provided as an output when a true/false answer cannot be provided e.g. when stopped due to resource constraints. In some embodiments, a measure of value N indicates that a given property that is being checked will not be violated within a distance N from an initial state from which the analysis started. Therefore, in such embodiments, a measure of value N indicates that the analysis has implicitly or explicitly covered every possible excursion of length N from the initial state, and formally proved that no counter-example is possible within this length N.

Abstract translation: 在确定数字电路的属性的有效性时执行的分析量与分析的性能同时测量，并且当不能提供真/假答案时被提供作为输出。 由于资源限制而停止。 在一些实施例中，值N的度量表示在从分析开始的初始状态开始的距离N内不会违反正在检查的给定属性。 因此，在这样的实施例中，值N的度量表示分析已经从初始状态隐含或明确地覆盖了长度N的每个可能的偏移，并且正式证明在该长度N内没有反例。

公开(公告)号：US20080066032A1

公开(公告)日：2008-03-13

申请号：US11939485

申请日：2007-11-13

Applicant: Jeremy Levitt ,  Christophe Gauthron ,  Chian-Min Ho ,  Ping Yeung ,  Kalyana Mulam ,  Ramesh Sathianathan

Inventor： Jeremy Levitt ,  Christophe Gauthron ,  Chian-Min Ho ,  Ping Yeung ,  Kalyana Mulam ,  Ramesh Sathianathan

IPC: G06F17/50

CPC classification number: G06F17/5081 ,  G06F17/50 ,  G06F17/504

Abstract: The amount of analysis performed in determining the validity of a property of a digital circuit is measured concurrent with performance of the analysis, and provided as an output when a true/false answer cannot be provided e.g. when stopped due to resource constraints. In some embodiments, a measure of value N indicates that a given property that is being checked will not be violated within a distance N from an initial state from which the analysis started. Therefore, in such embodiments, a measure of value N indicates that the analysis has implicitly or explicitly covered every possible excursion of length N from the initial state, and formally proved that no counter-example is possible within this length N.

Abstract translation: 在确定数字电路的属性的有效性时执行的分析量与分析的性能同时测量，并且当不能提供真/假答案时被提供作为输出。 由于资源限制而停止。 在一些实施例中，值N的度量表示在从分析开始的初始状态开始的距离N内不会违反正在检查的给定属性。 因此，在这样的实施例中，值N的度量表示分析已经从初始状态隐含地或明确地覆盖了长度N的每个可能的偏移，并且正式证明在该长度N内没有可能的对比示例。