公开(公告)号：US08608329B2

公开(公告)日：2013-12-17

申请号：US13209580

申请日：2011-08-15

申请人： Fu-Kuo Sun ,  Keh-Su Chang ,  Chien-Cheng Kuo ,  Cheng-Chung Lee

发明人： Fu-Kuo Sun ,  Keh-Su Chang ,  Chien-Cheng Kuo ,  Cheng-Chung Lee

IPC分类号： F21V9/16 ,  F21V13/02

CPC分类号： H05B33/145 ,  G02B27/141

摘要： A phosphor plate includes a glass layer, a wide-angle reflection dichroic filter and a phosphor layer. The wide-angle reflection dichroic filter is disposed on an exit surface of the glass layer. A first blue light and a second blue light of the incident ray are transmissible through the wide-angle reflection dichroic filter. The phosphor layer is disposed beside the wide-angle reflection dichroic filter. By the phosphor layer, the first blue light is excited as a first green light to be outputted and the second blue light is reflected to the wide-angle reflection dichroic filter. The second blue light and a portion of the first green light outputted from the phosphor layer are reflected by the wide-angle reflection dichroic filter, so that the portion of the first green light is transmitted through the phosphor layer and the second blue light is excited as a second green light by the phosphor layer.

摘要翻译： 荧光体板包括玻璃层，广角反射二向色滤光片和荧光体层。 广角反射二向色滤色器设置在玻璃层的出射表面上。 入射光线的第一蓝光和第二蓝光通过广角反射二向色滤光片传播。 磷光体层设置在广角反射二向色滤光片旁边。 通过荧光体层，第一蓝光被激发为要输出的第一绿光，并且第二蓝光被反射到广角反射二向色滤光器。 第二蓝光和从荧光体层输出的第一绿光的一部分被广角反射分色滤光器反射，使得第一绿光的一部分透过荧光层，第二蓝光被激发 作为荧光体层的第二绿色光。

公开(公告)号：US07620804B2

公开(公告)日：2009-11-17

申请号：US11200020

申请日：2005-08-10

申请人： Chien-Cheng Kuo

发明人： Chien-Cheng Kuo

IPC分类号： G06F9/32

CPC分类号： G06F9/3822 ,  G06F9/3804

摘要： A central processing unit (CPU) architecture with enhanced branch execution, being substantially a pipelined CPU with multiple pipelines, each pipeline having a plurality of stages, by which all instructions relating directly to a branch instruction of a code executed by the pipelined CPU are being fetched respectively by each corresponding pipeline for enabling the code to be executed without stall so that the number of cycles required to execute the code can be reduced effectively. Moreover, the multiple pipelines can save more cycles when the number of stages in one pipeline is large.

摘要翻译： 具有增强的分支执行的中央处理单元（CPU）架构，基本上是具有多个管线的流水线CPU，每个流水线具有多个级，通过该多个级直接与由流水线式CPU执行的代码的分支指令相关的所有指令正在 分别由每个对应的流水线取出，以使代码能够不停顿地执行，从而可以有效地减少执行代码所需的周期数。 此外，当一个管道中的级数很大时，多个管道可以节省更多的循环。

公开(公告)号：US07272680B2

公开(公告)日：2007-09-18

申请号：US11074627

申请日：2005-03-09

申请人： Chien-Cheng Kuo

发明人： Chien-Cheng Kuo

IPC分类号： G06F13/00 ,  G06F13/36 ,  G06F7/00

CPC分类号： G06F13/385 ,  G06F13/28

摘要： An improved method for accessing data is disclosed, which is capable of increasing the efficiency of data access by reducing the time consumed by registering data in the system memory while transferring data between computer peripherals.

摘要翻译： 公开了一种用于访问数据的改进方法，其能够通过在计算机外围设备之间传送数据的同时减少在系统存储器中注册数据所消耗的时间来提高数据访问的效率。

公开(公告)号：US20130229123A1

公开(公告)日：2013-09-05

申请号：US13562474

申请日：2012-07-31

申请人： Tain-Rein CHEN ,  Wan-Jung LIN ,  Chien-Cheng KUO

发明人： Tain-Rein CHEN ,  Wan-Jung LIN ,  Chien-Cheng KUO

IPC分类号： H05B37/02

CPC分类号： H05B37/0263

摘要： A lighting-dimming device has a dimming module with an encoding function and at least one light module with a decoding function and controlled by the dimming module. The dimming module is designated with a required brightness and address command by a user. A triode AC switch of the dimming module is controlled to chop a power based on the required brightness and address command. The chopped power is transmitted to the light module to control the brightness of the light module. In the chopped power, only a part of cycles of the power is chopped and most of the power waveforms are maintained. Therefore, a high power factor is maintained.

摘要翻译： 照明调光装置具有具有编码功能的调光模块和具有解码功能并由调光模块控制的至少一个光模块。 调光模块由用户指定所需的亮度和地址命令。 根据所需的亮度和地址命令，控制调光模块的三极管交流开关，以切断电源。 将切断的功率传输到光模块以控制光模块的亮度。 在斩波功率中，只有一部分电源的周期被切断，大部分功率波形被维持。 因此，维持高功率因数。

公开(公告)号：US20120039065A1

公开(公告)日：2012-02-16

申请号：US13209580

申请日：2011-08-15

申请人： Fu-Kuo Sun ,  Keh-Su Chang ,  Chien-Cheng Kuo ,  Cheng-Chung Lee

发明人： Fu-Kuo Sun ,  Keh-Su Chang ,  Chien-Cheng Kuo ,  Cheng-Chung Lee

IPC分类号： F21K2/00 ,  G02B27/14

CPC分类号： H05B33/145 ,  G02B27/141

摘要： A phosphor plate includes a glass layer, a wide-angle reflection dichroic filter and a phosphor layer. The wide-angle reflection dichroic filter is disposed on an exit surface of the glass layer. A first blue light and a second blue light of the incident ray are transmissible through the wide-angle reflection dichroic filter. The phosphor layer is disposed beside the wide-angle reflection dichroic filter. By the phosphor layer, the first blue light is excited as a first green light to be outputted and the second blue light is reflected to the wide-angle reflection dichroic filter. The second blue light and a portion of the first green light outputted from the phosphor layer are reflected by the wide-angle reflection dichroic filter, so that the portion of the first green light is transmitted through the phosphor layer and the second blue light is excited as a second green light by the phosphor layer.

摘要翻译： 荧光体板包括玻璃层，广角反射二向色滤光片和荧光体层。 广角反射二向色滤色器设置在玻璃层的出射表面上。 入射光线的第一蓝光和第二蓝光通过广角反射二向色滤光片传播。 磷光体层设置在广角反射二向色滤光片旁边。 通过荧光体层，第一蓝光被激发为要输出的第一绿光，并且第二蓝光被反射到广角反射二向色滤光器。 第二蓝光和从荧光体层输出的第一绿光的一部分被广角反射分色滤光器反射，使得第一绿光的一部分透过荧光层，第二蓝光被激发 作为荧光体层的第二绿色光。

公开(公告)号：US08085694B2

公开(公告)日：2011-12-27

申请号：US12382644

申请日：2009-03-20

申请人： Chunli Wu ,  Tsung-Liang Lu ,  Yen-Chen Chen ,  Chih-Wen Chang ,  Chien-Cheng Kuo

发明人： Chunli Wu ,  Tsung-Liang Lu ,  Yen-Chen Chen ,  Chih-Wen Chang ,  Chien-Cheng Kuo

IPC分类号： H04L7/00

CPC分类号： H04W52/0216 ,  H04W24/00 ,  H04W76/28 ,  Y02D70/1242 ,  Y02D70/24

摘要： A method for avoiding unnecessary excessive stay of short cycle in discontinuous reception mechanism begins by using the short cycle while the short cycle timer is running. Then, it determines whether the inactivity timer expires or not and whether the short cycle timer expires or not. If the inactivity timer expires but the short cycle timer does not expire, the short cycle is used. If the short cycle timer expires but the inactivity timer does not expire, the long cycle is used. If the inactivity timer and the short cycle timer expire at the same time, either the short cycle or the long cycle is selected for use.

摘要翻译： 在短周期定时器运行时，通过使用短周期来避免不连续接收机制中短暂周期的不必要过度停留的方法。 然后，确定不活动定时器是否到期，以及短周期定时器是否到期。 如果不活动定时器到期但短周期定时器不到期，则使用短周期。 如果短周期定时器到期，但不活动定时器不到期，则使用长周期。 如果不活动定时器和短周期定时器同时到期，则选择短周期或长周期使用。

公开(公告)号：US20090238105A1

公开(公告)日：2009-09-24

申请号：US12382644

申请日：2009-03-20

申请人： Chunli Wu ,  Tsung-Liang Lu ,  Yen-Chen Chen ,  Chih-Wen Chang ,  Chien-Cheng Kuo

发明人： Chunli Wu ,  Tsung-Liang Lu ,  Yen-Chen Chen ,  Chih-Wen Chang ,  Chien-Cheng Kuo

IPC分类号： G08C17/00

CPC分类号： H04W52/0216 ,  H04W24/00 ,  H04W76/28 ,  Y02D70/1242 ,  Y02D70/24

摘要： A method for avoiding unnecessary excessive stay of short cycle in discontinuous reception mechanism begins by using the short cycle while the short cycle timer is running. Then, it determines whether the inactivity timer expires or not and whether the short cycle timer expires or not. If the inactivity timer expires but the short cycle timer does not expire, the short cycle is used. If the short cycle timer expires but the inactivity timer does not expire, the long cycle is used. If the inactivity timer and the short cycle timer expire at the same time, either the short cycle or the long cycle is selected for use.

摘要翻译： 在短周期定时器运行时，通过使用短周期来避免不连续接收机制中短暂周期的不必要过度停留的方法。 然后，确定不活动定时器是否到期，以及短周期定时器是否到期。 如果不活动定时器到期但短周期定时器不到期，则使用短周期。 如果短周期定时器到期，但不活动定时器不到期，则使用长周期。 如果不活动定时器和短周期定时器同时到期，则选择短周期或长周期使用。

公开(公告)号：US20070016760A1

公开(公告)日：2007-01-18

申请号：US11200020

申请日：2005-08-10

申请人： Chien-Cheng Kuo

发明人： Chien-Cheng Kuo

IPC分类号： G06F15/00

CPC分类号： G06F9/3822 ,  G06F9/3804

摘要： A central processing unit (CPU) architecture with enhanced branch prediction, being substantially a pipelined CPU with multiple pipelines, each pipeline having a plurality of stages, by which all instructions relating directly to a branch instruction of a code executed by the pipelined CPU are being fetched respectively by each corresponding pipeline for enabling the code to be executed without stall so that the number of cycles required to execute the code can be reduced effectively. Moreover, the multiple pipelines can save more cycles when the number of stages in one pipeline is large.

摘要翻译： 具有增强的分支预测的中央处理单元（CPU）架构，基本上是具有多个管线的流水线CPU，每个流水线具有多个级，通过该多个级直接与由流水线式CPU执行的代码的分支指令相关的所有指令正在 分别由每个对应的流水线取出，以使代码能够不停顿地执行，从而可以有效地减少执行代码所需的周期数。 此外，当一个管道中的级数很大时，多个管道可以节省更多的循环。

公开(公告)号：US20060129734A1

公开(公告)日：2006-06-15

申请号：US11074627

申请日：2005-03-09

申请人： Chien-Cheng Kuo

发明人： Chien-Cheng Kuo

IPC分类号： G06F13/36

CPC分类号： G06F13/385 ,  G06F13/28

摘要： An improved method for accessing data is disclosed, which is capable of increasing the efficiency of data access by reducing the time consumed by registering data in the system memory while transferring data between computer peripherals.

摘要翻译： 公开了一种用于访问数据的改进方法，其能够通过在计算机外围设备之间传送数据的同时减少在系统存储器中注册数据所消耗的时间来提高数据访问的效率。

公开(公告)号：US09372528B2

公开(公告)日：2016-06-21

申请号：US13481861

申请日：2012-05-27

申请人： Chih-Hung Huang ,  Chien-Cheng Kuo ,  Shih-Min Hsu

发明人： Chih-Hung Huang ,  Chien-Cheng Kuo ,  Shih-Min Hsu

IPC分类号： G06F3/00 ,  G06F1/32

CPC分类号： G06F1/3287 ,  G06F1/3253 ,  Y02D10/151 ,  Y02D10/171

摘要： A USB 3.0 host with low power consumption includes a super speed circuit, a non-super speed circuit, and a control module. The super speed circuit is used for transmitting data at a first transmission speed. A default state of the super speed circuit is turning-off. The non-super speed circuit is used for transmitting data at a second transmission speed, a third transmission speed, or a fourth transmission speed. The first transmission speed is faster than the second transmission speed, the third transmission speed, and the fourth transmission speed. The control module is used for detecting whether a USB peripheral device is connected to the USB 3.0 host, and controlling turning-on and turning-off of the super speed circuit.

摘要翻译： 具有低功耗的USB 3.0主机包括超速电路，非超速电路和控制模块。 超速电路用于以第一传输速度发送数据。 超速电路的默认状态是关闭。 非超速电路用于以第二传输速度，第三传输速度或第四传输速度传输数据。 第一传输速度比第二传输速度，第三传输速度和第四传输速度快。 控制模块用于检测USB外围设备是否连接到USB 3.0主机，并控制超速电路的导通和关断。